S_030008_DATA_FORMAT(format) |
S_030008_NUM_FORMAT_ALL(num_format) |
S_030008_FORMAT_COMP_ALL(format_comp) |
- S_030008_SRF_MODE_ALL(1) |
S_030008_ENDIAN_SWAP(endian);
view->tex_resource_words[3] = swizzle_res;
/*
}
view->tex_resource_words[4] = (word4 |
- S_030010_SRF_MODE_ALL(V_030010_SRF_MODE_ZERO_CLAMP_MINUS_ONE) |
S_030010_ENDIAN_SWAP(endian));
view->tex_resource_words[5] = S_030014_BASE_ARRAY(state->u.tex.first_layer) |
S_030014_LAST_ARRAY(state->u.tex.last_layer);
vtx.data_format = format;
vtx.num_format_all = num_format;
vtx.format_comp_all = format_comp;
- vtx.srf_mode_all = 1;
vtx.offset = elements[i].src_offset;
vtx.endian = endian;
vtx.data_format = FMT_32_32_32_32_FLOAT;
vtx.num_format_all = 2; /* NUM_FORMAT_SCALED */
vtx.format_comp_all = 1; /* FORMAT_COMP_SIGNED */
- vtx.srf_mode_all = 1; /* SRF_MODE_NO_ZERO */
vtx.endian = r600_endian_swap(32);
if ((r = r600_bytecode_add_vtx(ctx->bc, &vtx)))
vtx.dst_sel_z = (inst->Dst[0].Register.WriteMask & 4) ? 2 : 7; /* SEL_Z */
vtx.dst_sel_w = (inst->Dst[0].Register.WriteMask & 8) ? 3 : 7; /* SEL_W */
vtx.use_const_fields = 1;
- vtx.srf_mode_all = 1; /* SRF_MODE_NO_ZERO */
if ((r = r600_bytecode_add_vtx(ctx->bc, &vtx)))
return r;
S_038008_DATA_FORMAT(format) |
S_038008_NUM_FORMAT_ALL(num_format) |
S_038008_FORMAT_COMP_ALL(format_comp) |
- S_038008_SRF_MODE_ALL(1) |
S_038008_ENDIAN_SWAP(endian);
view->tex_resource_words[3] = 0;
/*
view->tex_resource_words[3] = tmp->surface.level[offset_level + 1].offset >> 8;
}
view->tex_resource_words[4] = (word4 |
- S_038010_SRF_MODE_ALL(V_038010_SRF_MODE_ZERO_CLAMP_MINUS_ONE) |
S_038010_REQUEST_SIZE(1) |
S_038010_ENDIAN_SWAP(endian) |
S_038010_BASE_LEVEL(0));