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i386.md: Check TARGET_ macros and optimize_size before checking function returns...
authorH.J. Lu <hjl@gcc.gnu.org>
Mon, 6 Aug 2007 14:44:02 +0000 (07:44 -0700)
committerH.J. Lu <hjl@gcc.gnu.org>
Mon, 6 Aug 2007 14:44:02 +0000 (07:44 -0700)
2007-08-06  H.J. Lu  <hongjiu.lu@intel.com>

* config/i386/i386.md: Check TARGET_ macros and optimize_size
before checking function returns in conditional expressions.

From-SVN: r127243

gcc/ChangeLog patch | blob | history
gcc/config/i386/i386.md patch | blob | history

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 62005cf0ce07cf002caac749fdb50da367dea16c..22f028ef86da3a0b9ba5027f36f13c988985bb7b 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2007-08-06  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * config/i386/i386.md: Check TARGET_ macros and optimize_size
+       before checking function returns in conditional expressions.
+
 2007-08-06  Alfred Minarik  <a.minarik@aon.at>
 
        PR pch/13676
@@ -11,33 +16,33 @@
 
 2008-08-05  Paolo Bonzini  <bonzini@gnu.org>
 
-        * configure.ac: Remove --enable-checking=df from default settings.
-        * tree-pass.h (TODO_df_verify): New.  Shift TODO_mark_first_instance.
-        * df-core.c (df_finish_pass) [ENABLE_CHECKING]: Schedule verification
-        if the parameter is true.
-        (df_analyze) [!ENABLE_DF_CHECKING]: Also do verification if the
-        DF_VERIFY_SCHEDULED flag is true.
-        * df.h (enum df_changeable_flags): Add DF_VERIFY_SCHEDULED.
-        (df_finish_pass): Adjust prototype.
-        * passes.c (execute_todo): Schedule verification if TODO_df_verify is
-        true.
-
-        * see.c (pass_see): Add TODO_df_verify.
-        * loop-init.c (pass_rtl_move_loop_invariants): Add TODO_df_verify.
-        * global.c (rest_of_handle_global_alloc): Schedule verification
-        after the pass.
-        * local-alloc.c (rest_of_handle_local_alloc): Schedule verification
-        before the pass.
-        * function.c (pass_thread_prologue_and_epilogue): Add TODO_df_verify.
-        * gcse.c (rest_of_handle_gcse): Adjust call to df_finish_pass.
-        * loop-iv.c (iv_analysis_done): Schedule verification after the pass.
-
-        * config/sh/sh.c (sh_output_mi_thunk): Remove dead code.
-        * config/ia64/ia64.c (ia64_reorg): Adjust call to df_finish_pass.
-        * config/bfin/bfin.c (bfin_reorg): Adjust call to df_finish_pass.
+       * configure.ac: Remove --enable-checking=df from default settings.
+       * tree-pass.h (TODO_df_verify): New.  Shift TODO_mark_first_instance.
+       * df-core.c (df_finish_pass) [ENABLE_CHECKING]: Schedule verification
+       if the parameter is true.
+       (df_analyze) [!ENABLE_DF_CHECKING]: Also do verification if the
+       DF_VERIFY_SCHEDULED flag is true.
+       * df.h (enum df_changeable_flags): Add DF_VERIFY_SCHEDULED.
+       (df_finish_pass): Adjust prototype.
+       * passes.c (execute_todo): Schedule verification if TODO_df_verify is
+       true.
+
+       * see.c (pass_see): Add TODO_df_verify.
+       * loop-init.c (pass_rtl_move_loop_invariants): Add TODO_df_verify.
+       * global.c (rest_of_handle_global_alloc): Schedule verification
+       after the pass.
+       * local-alloc.c (rest_of_handle_local_alloc): Schedule verification
+       before the pass.
+       * function.c (pass_thread_prologue_and_epilogue): Add TODO_df_verify.
+       * gcse.c (rest_of_handle_gcse): Adjust call to df_finish_pass.
+       * loop-iv.c (iv_analysis_done): Schedule verification after the pass.
+
+       * config/sh/sh.c (sh_output_mi_thunk): Remove dead code.
+       * config/ia64/ia64.c (ia64_reorg): Adjust call to df_finish_pass.
+       * config/bfin/bfin.c (bfin_reorg): Adjust call to df_finish_pass.
 
 2007-08-05  Vladimir Yanovsky  <yanov@il.ibm.com>
-            Revital Eres <eres@il.ibm.com>
+           Revital Eres <eres@il.ibm.com>
 
        * doc/invoke.texi (-fmodulo-sched-allow-regmoves): Document new
        flag.
@@ -904,7 +909,7 @@
        * doc/invoke.texi: Follow spelling conventions.
 
 2007-07-29  Vladimir Yanovsky  <yanov@il.ibm.com>
-            Revital Eres  <eres@il.ibm.com>
+           Revital Eres  <eres@il.ibm.com>
 
        * modulo-sched.c (sms_schedule): Avoid loops which includes
        auto-increment instructions.
@@ -2152,16 +2157,16 @@
 2007-07-16  Sandra Loosemore  <sandra@codesourcery.com>
            David Ung  <davidu@mips.com>
 
-        * config/mips/mips.h (TUNE_24K): Define.
+       * config/mips/mips.h (TUNE_24K): Define.
        (TUNE_MACC_CHAINS): Add TUNE_24K.
-        * config/mips/mips.md: (*mul_acc_si, *mul_sub_si): Change type to
-        imadd.
-        * config/mips/74k.md (r74k_int_mult): Split madd/msub to ..
-        (r74k_int_madd): .. this new reservation.
-        (define_bypass): Fixed bypasses for r74k_int_madd to use
+       * config/mips/mips.md: (*mul_acc_si, *mul_sub_si): Change type to
+       imadd.
+       * config/mips/74k.md (r74k_int_mult): Split madd/msub to ..
+       (r74k_int_madd): .. this new reservation.
+       (define_bypass): Fixed bypasses for r74k_int_madd to use
        mips_linked_madd_p.
-        * config/mips/24k.md (define_bypass): Define new
-        r24k_int_mul3->r24k_int_madd bypass using mips_linked_madd_p.
+       * config/mips/24k.md (define_bypass): Define new
+       r24k_int_mul3->r24k_int_madd bypass using mips_linked_madd_p.
 
 2007-07-16  Sandra Loosemore  <sandra@codesourcery.com>
            Nigel Stephens  <nigel@mips.com>
@@ -3030,7 +3035,7 @@
        * doc/tm.texi (DOLLARS_IN_IDENTIFIERS): Update.
 
 2007-07-06  Ian Lance Taylor  <iant@google.com>
-            Zack Weinberg  <zackw@panix.com>
+           Zack Weinberg  <zackw@panix.com>
 
        PR middle-end/32441
        * builtins.c (std_expand_builtin_va_start): Don't use make_tree.
@@ -3307,7 +3312,7 @@
        after \.
 
 2007-07-04  David Ung  <davidu@mips.com>
-            Joseph Myers  <joseph@codesourcery.com>
+           Joseph Myers  <joseph@codesourcery.com>
 
        * config/mips/mips.md (type): Add logical, signext and move.
        (one_cmpl<mode>2, *and<mode>3, *and<mode>3_mips16, *ior<mode>3,
@@ -4276,7 +4281,7 @@
 
 2007-06-26  Kenneth Zadeck <zadeck@naturalbridge.com>
 
-        * tree.def (VEC_WIDEN_MULT_LO_EXPR): Corrected string name.
+       * tree.def (VEC_WIDEN_MULT_LO_EXPR): Corrected string name.
        
 2007-06-26  Steve Ellcey  <sje@cup.hp.com>
 
@@ -4496,7 +4501,7 @@
 
 2007-06-21  Kenneth Zadeck <zadeck@naturalbridge.com>
 
-        * df-problems.c (df_note_bb_compute): Made computation of live
+       * df-problems.c (df_note_bb_compute): Made computation of live
        info consistent with df_lr.
 
 2007-06-21  Richard Guenther  <rguenther@suse.de>
@@ -4571,7 +4576,7 @@
        (epilogue_reit): Rename to epilogue_reit_24.
 
 2007-06-20  Seongbae Park  <seongbae.park@gmail.com>
-            Maxim Kuvyrkov  <mkuvyrkov@ispras.ru>
+           Maxim Kuvyrkov  <mkuvyrkov@ispras.ru>
 
        * dbgcnt.def (global_alloc_at_func, global_alloc_at_reg):
        New counters.
@@ -4919,9 +4924,9 @@
        (Intel 386 and AMD x86_64 Options): Document -mrecip.
 
 2007-06-15  Andrew Pinski <andrew_pinski@playstation.sony.com>
-            Zdenek Dvorak <dvorakz@suse.cz>
-            Richard Guenther  <rguenther@suse.de>
-            Kaz Kojima  <kkojima@gcc.gnu.org>
+           Zdenek Dvorak <dvorakz@suse.cz>
+           Richard Guenther  <rguenther@suse.de>
+           Kaz Kojima  <kkojima@gcc.gnu.org>
 
        * tree-vrp.c (compare_values_warnv): Convert val2 to
        the type of val1.
@@ -5788,7 +5793,7 @@
        (vect_estimate_min_profitable_iterations): New function to estimate
        mimimimum iterartions required for vector version of loop to be
        profitable over scalar version.
-        (vect_model_reduction_cost): New function.
+       (vect_model_reduction_cost): New function.
        (vect_model_induction_cost): New function.
        (vect_model_simple_cost): New function.
        (vect_cost_strided_group_size): New function.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index a1350f055410956e4b4225083e3ccafe2224d779..cb96182299ac1151f994ea12f2d02faafc8b768a 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -3541,9 +3541,9 @@
   emit_move_insn (operands[3], operands[1]);
 
   /* Generate a cltd if possible and doing so it profitable.  */
-  if (true_regnum (operands[1]) == 0
-      && true_regnum (operands[2]) == 1
-      && (optimize_size || TARGET_USE_CLTD))
+  if ((optimize_size || TARGET_USE_CLTD)
+      && true_regnum (operands[1]) == 0
+      && true_regnum (operands[2]) == 1)
     {
       emit_insn (gen_ashrsi3_31 (operands[2], operands[1], GEN_INT (31)));
     }
@@ -3572,8 +3572,8 @@
     emit_move_insn (operands[3], operands[1]);
 
   /* Generate a cltd if possible and doing so it profitable.  */
-  if (true_regnum (operands[3]) == 0
-      && (optimize_size || TARGET_USE_CLTD))
+  if ((optimize_size || TARGET_USE_CLTD)
+      && true_regnum (operands[3]) == 0)
     {
       emit_insn (gen_ashrsi3_31 (operands[4], operands[3], GEN_INT (31)));
       DONE;
@@ -10478,13 +10478,14 @@
          (const_int 0)))
    (set (match_operand:DI 0 "nonimmediate_operand" "=rm")
        (ashift:DI (match_dup 1) (match_dup 2)))]
-  "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFT, DImode, operands)
+  "TARGET_64BIT
    && (optimize_size
        || !TARGET_PARTIAL_FLAG_REG_STALL
        || (operands[2] == const1_rtx
           && (TARGET_SHIFT1
-              || (TARGET_DOUBLE_WITH_ADD && REG_P (operands[0])))))"
+              || (TARGET_DOUBLE_WITH_ADD && REG_P (operands[0])))))
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (ASHIFT, DImode, operands)"
 {
   switch (get_attr_type (insn))
     {
@@ -10519,13 +10520,14 @@
                     (match_operand:QI 2 "immediate_operand" "e"))
          (const_int 0)))
    (clobber (match_scratch:DI 0 "=r"))]
-  "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFT, DImode, operands)
+  "TARGET_64BIT
    && (optimize_size
        || !TARGET_PARTIAL_FLAG_REG_STALL
        || (operands[2] == const1_rtx
           && (TARGET_SHIFT1
-              || TARGET_DOUBLE_WITH_ADD)))"
+              || TARGET_DOUBLE_WITH_ADD)))
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (ASHIFT, DImode, operands)"
 {
   switch (get_attr_type (insn))
     {
@@ -10806,13 +10808,13 @@
          (const_int 0)))
    (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
        (ashift:SI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFT, SImode, operands)
-   && (optimize_size
-       || !TARGET_PARTIAL_FLAG_REG_STALL
-       || (operands[2] == const1_rtx
-          && (TARGET_SHIFT1
-              || (TARGET_DOUBLE_WITH_ADD && REG_P (operands[0])))))"
+   "(optimize_size
+     || !TARGET_PARTIAL_FLAG_REG_STALL
+     || (operands[2] == const1_rtx
+        && (TARGET_SHIFT1
+            || (TARGET_DOUBLE_WITH_ADD && REG_P (operands[0])))))
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (ASHIFT, SImode, operands)"
 {
   switch (get_attr_type (insn))
     {
@@ -10847,13 +10849,13 @@
                     (match_operand:QI 2 "const_1_to_31_operand" "I"))
          (const_int 0)))
    (clobber (match_scratch:SI 0 "=r"))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFT, SImode, operands)
-   && (optimize_size
-       || !TARGET_PARTIAL_FLAG_REG_STALL
-       || (operands[2] == const1_rtx
-          && (TARGET_SHIFT1
-              || TARGET_DOUBLE_WITH_ADD)))"
+  "(optimize_size
+    || !TARGET_PARTIAL_FLAG_REG_STALL
+    || (operands[2] == const1_rtx
+       && (TARGET_SHIFT1
+           || TARGET_DOUBLE_WITH_ADD)))
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (ASHIFT, SImode, operands)"
 {
   switch (get_attr_type (insn))
     {
@@ -10889,13 +10891,14 @@
          (const_int 0)))
    (set (match_operand:DI 0 "register_operand" "=r")
        (zero_extend:DI (ashift:SI (match_dup 1) (match_dup 2))))]
-  "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFT, SImode, operands)
+  "TARGET_64BIT
    && (optimize_size
        || !TARGET_PARTIAL_FLAG_REG_STALL
        || (operands[2] == const1_rtx
           && (TARGET_SHIFT1
-              || TARGET_DOUBLE_WITH_ADD)))"
+              || TARGET_DOUBLE_WITH_ADD)))
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (ASHIFT, SImode, operands)"
 {
   switch (get_attr_type (insn))
     {
@@ -11013,13 +11016,13 @@
          (const_int 0)))
    (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
        (ashift:HI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFT, HImode, operands)
-   && (optimize_size
-       || !TARGET_PARTIAL_FLAG_REG_STALL
-       || (operands[2] == const1_rtx
-          && (TARGET_SHIFT1
-              || (TARGET_DOUBLE_WITH_ADD && REG_P (operands[0])))))"
+  "(optimize_size
+    || !TARGET_PARTIAL_FLAG_REG_STALL
+    || (operands[2] == const1_rtx
+       && (TARGET_SHIFT1
+           || (TARGET_DOUBLE_WITH_ADD && REG_P (operands[0])))))
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (ASHIFT, HImode, operands)"
 {
   switch (get_attr_type (insn))
     {
@@ -11054,13 +11057,13 @@
                     (match_operand:QI 2 "const_1_to_31_operand" "I"))
          (const_int 0)))
    (clobber (match_scratch:HI 0 "=r"))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFT, HImode, operands)
-   && (optimize_size
-       || !TARGET_PARTIAL_FLAG_REG_STALL
-       || (operands[2] == const1_rtx
-          && (TARGET_SHIFT1
-              || TARGET_DOUBLE_WITH_ADD)))"
+  "(optimize_size
+    || !TARGET_PARTIAL_FLAG_REG_STALL
+    || (operands[2] == const1_rtx
+       && (TARGET_SHIFT1
+           || TARGET_DOUBLE_WITH_ADD)))
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (ASHIFT, HImode, operands)"
 {
   switch (get_attr_type (insn))
     {
@@ -11217,13 +11220,13 @@
          (const_int 0)))
    (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
        (ashift:QI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFT, QImode, operands)
-   && (optimize_size
-       || !TARGET_PARTIAL_FLAG_REG_STALL
-       || (operands[2] == const1_rtx
-          && (TARGET_SHIFT1
-              || (TARGET_DOUBLE_WITH_ADD && REG_P (operands[0])))))"
+  "(optimize_size
+    || !TARGET_PARTIAL_FLAG_REG_STALL
+    || (operands[2] == const1_rtx
+       && (TARGET_SHIFT1
+           || (TARGET_DOUBLE_WITH_ADD && REG_P (operands[0])))))
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (ASHIFT, QImode, operands)"
 {
   switch (get_attr_type (insn))
     {
@@ -11258,13 +11261,13 @@
                     (match_operand:QI 2 "const_1_to_31_operand" "I"))
          (const_int 0)))
    (clobber (match_scratch:QI 0 "=q"))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFT, QImode, operands)
-   && (optimize_size
-       || !TARGET_PARTIAL_FLAG_REG_STALL
-       || (operands[2] == const1_rtx
-          && (TARGET_SHIFT1
-              || TARGET_DOUBLE_WITH_ADD)))"
+  "(optimize_size
+    || !TARGET_PARTIAL_FLAG_REG_STALL
+    || (operands[2] == const1_rtx
+       && (TARGET_SHIFT1
+           || TARGET_DOUBLE_WITH_ADD)))
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (ASHIFT, QImode, operands)"
 {
   switch (get_attr_type (insn))
     {
@@ -11394,8 +11397,9 @@
        (ashiftrt:DI (match_operand:DI 1 "nonimmediate_operand" "0")
                     (match_operand:QI 2 "const1_operand" "")))
    (clobber (reg:CC FLAGS_REG))]
-  "TARGET_64BIT && ix86_binary_operator_ok (ASHIFTRT, DImode, operands)
-   && (TARGET_SHIFT1 || optimize_size)"
+  "TARGET_64BIT
+   && (TARGET_SHIFT1 || optimize_size)
+   && ix86_binary_operator_ok (ASHIFTRT, DImode, operands)"
   "sar{q}\t%0"
   [(set_attr "type" "ishift")
    (set (attr "length")
@@ -11426,8 +11430,9 @@
          (const_int 0)))
    (set (match_operand:DI 0 "nonimmediate_operand" "=rm")
        (ashiftrt:DI (match_dup 1) (match_dup 2)))]
-  "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode)
+  "TARGET_64BIT
    && (TARGET_SHIFT1 || optimize_size)
+   && ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (ASHIFTRT, DImode, operands)"
   "sar{q}\t%0"
   [(set_attr "type" "ishift")
@@ -11443,8 +11448,9 @@
                       (match_operand:QI 2 "const1_operand" ""))
          (const_int 0)))
    (clobber (match_scratch:DI 0 "=r"))]
-  "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode)
+  "TARGET_64BIT
    && (TARGET_SHIFT1 || optimize_size)
+   && ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (ASHIFTRT, DImode, operands)"
   "sar{q}\t%0"
   [(set_attr "type" "ishift")
@@ -11461,10 +11467,10 @@
          (const_int 0)))
    (set (match_operand:DI 0 "nonimmediate_operand" "=rm")
        (ashiftrt:DI (match_dup 1) (match_dup 2)))]
-  "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFTRT, DImode, operands)
-   && (optimize_size
-       || !TARGET_PARTIAL_FLAG_REG_STALL)"
+  "TARGET_64BIT
+   && (optimize_size || !TARGET_PARTIAL_FLAG_REG_STALL)
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (ASHIFTRT, DImode, operands)"
   "sar{q}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "DI")])
@@ -11476,10 +11482,10 @@
                       (match_operand:QI 2 "const_int_operand" "n"))
          (const_int 0)))
    (clobber (match_scratch:DI 0 "=r"))]
-  "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFTRT, DImode, operands)
-   && (optimize_size
-       || !TARGET_PARTIAL_FLAG_REG_STALL)"
+  "TARGET_64BIT
+   && (optimize_size || !TARGET_PARTIAL_FLAG_REG_STALL)
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (ASHIFTRT, DImode, operands)"
   "sar{q}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "DI")])
@@ -11607,8 +11613,8 @@
        (ashiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
                     (match_operand:QI 2 "const1_operand" "")))
    (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (ASHIFTRT, SImode, operands)
-   && (TARGET_SHIFT1 || optimize_size)"
+  "(TARGET_SHIFT1 || optimize_size)
+   && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
   "sar{l}\t%0"
   [(set_attr "type" "ishift")
    (set (attr "length")
@@ -11621,8 +11627,9 @@
        (zero_extend:DI (ashiftrt:SI (match_operand:SI 1 "register_operand" "0")
                                     (match_operand:QI 2 "const1_operand" ""))))
    (clobber (reg:CC FLAGS_REG))]
-  "TARGET_64BIT && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)
-   && (TARGET_SHIFT1 || optimize_size)"
+  "TARGET_64BIT
+   && (TARGET_SHIFT1 || optimize_size)
+   && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
   "sar{l}\t%k0"
   [(set_attr "type" "ishift")
    (set_attr "length" "2")])
@@ -11662,8 +11669,8 @@
          (const_int 0)))
    (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
        (ashiftrt:SI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && (TARGET_SHIFT1 || optimize_size)
+  "(TARGET_SHIFT1 || optimize_size)
+   && ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
   "sar{l}\t%0"
   [(set_attr "type" "ishift")
@@ -11679,8 +11686,8 @@
                       (match_operand:QI 2 "const1_operand" ""))
          (const_int 0)))
    (clobber (match_scratch:SI 0 "=r"))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && (TARGET_SHIFT1 || optimize_size)
+  "(TARGET_SHIFT1 || optimize_size)
+   && ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
   "sar{l}\t%0"
   [(set_attr "type" "ishift")
@@ -11694,8 +11701,9 @@
          (const_int 0)))
    (set (match_operand:DI 0 "register_operand" "=r")
        (zero_extend:DI (ashiftrt:SI (match_dup 1) (match_dup 2))))]
-  "TARGET_64BIT && ix86_match_ccmode (insn, CCmode)
+  "TARGET_64BIT
    && (TARGET_SHIFT1 || optimize_size)
+   && ix86_match_ccmode (insn, CCmode)
    && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
   "sar{l}\t%k0"
   [(set_attr "type" "ishift")
@@ -11712,10 +11720,9 @@
          (const_int 0)))
    (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
        (ashiftrt:SI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)
-   && (optimize_size
-       || !TARGET_PARTIAL_FLAG_REG_STALL)"
+  "(optimize_size || !TARGET_PARTIAL_FLAG_REG_STALL)
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
   "sar{l}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "SI")])
@@ -11727,10 +11734,9 @@
                       (match_operand:QI 2 "const_1_to_31_operand" "I"))
          (const_int 0)))
    (clobber (match_scratch:SI 0 "=r"))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)
-   && (optimize_size
-       || !TARGET_PARTIAL_FLAG_REG_STALL)"
+  "(optimize_size || !TARGET_PARTIAL_FLAG_REG_STALL)
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
   "sar{l}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "SI")])
@@ -11743,10 +11749,10 @@
          (const_int 0)))
    (set (match_operand:DI 0 "register_operand" "=r")
        (zero_extend:DI (ashiftrt:SI (match_dup 1) (match_dup 2))))]
-  "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)
-   && (optimize_size
-       || !TARGET_PARTIAL_FLAG_REG_STALL)"
+  "TARGET_64BIT
+   && (optimize_size || !TARGET_PARTIAL_FLAG_REG_STALL)
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (ASHIFTRT, SImode, operands)"
   "sar{l}\t{%2, %k0|%k0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "SI")])
@@ -11764,8 +11770,8 @@
        (ashiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
                     (match_operand:QI 2 "const1_operand" "")))
    (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (ASHIFTRT, HImode, operands)
-   && (TARGET_SHIFT1 || optimize_size)"
+  "(TARGET_SHIFT1 || optimize_size)
+   && ix86_binary_operator_ok (ASHIFTRT, HImode, operands)"
   "sar{w}\t%0"
   [(set_attr "type" "ishift")
    (set (attr "length")
@@ -11796,8 +11802,8 @@
          (const_int 0)))
    (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
        (ashiftrt:HI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && (TARGET_SHIFT1 || optimize_size)
+  "(TARGET_SHIFT1 || optimize_size)
+   && ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (ASHIFTRT, HImode, operands)"
   "sar{w}\t%0"
   [(set_attr "type" "ishift")
@@ -11813,8 +11819,8 @@
                       (match_operand:QI 2 "const1_operand" ""))
          (const_int 0)))
    (clobber (match_scratch:HI 0 "=r"))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && (TARGET_SHIFT1 || optimize_size)
+  "(TARGET_SHIFT1 || optimize_size)
+   && ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (ASHIFTRT, HImode, operands)"
   "sar{w}\t%0"
   [(set_attr "type" "ishift")
@@ -11831,10 +11837,9 @@
          (const_int 0)))
    (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
        (ashiftrt:HI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFTRT, HImode, operands)
-   && (optimize_size
-       || !TARGET_PARTIAL_FLAG_REG_STALL)"
+  "(optimize_size || !TARGET_PARTIAL_FLAG_REG_STALL)
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (ASHIFTRT, HImode, operands)"
   "sar{w}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "HI")])
@@ -11846,10 +11851,9 @@
                       (match_operand:QI 2 "const_1_to_31_operand" "I"))
          (const_int 0)))
    (clobber (match_scratch:HI 0 "=r"))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFTRT, HImode, operands)
-   && (optimize_size
-       || !TARGET_PARTIAL_FLAG_REG_STALL)"
+  "(optimize_size || !TARGET_PARTIAL_FLAG_REG_STALL)
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (ASHIFTRT, HImode, operands)"
   "sar{w}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "HI")])
@@ -11867,8 +11871,8 @@
        (ashiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
                     (match_operand:QI 2 "const1_operand" "")))
    (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (ASHIFTRT, QImode, operands)
-   && (TARGET_SHIFT1 || optimize_size)"
+  "(TARGET_SHIFT1 || optimize_size)
+   && ix86_binary_operator_ok (ASHIFTRT, QImode, operands)"
   "sar{b}\t%0"
   [(set_attr "type" "ishift")
    (set (attr "length")
@@ -11881,9 +11885,9 @@
        (ashiftrt:QI (match_dup 0)
                     (match_operand:QI 1 "const1_operand" "")))
    (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (ASHIFTRT, QImode, operands)
-   && (! TARGET_PARTIAL_REG_STALL || optimize_size)
-   && (TARGET_SHIFT1 || optimize_size)"
+  "(! TARGET_PARTIAL_REG_STALL || optimize_size)
+   && (TARGET_SHIFT1 || optimize_size)
+   && ix86_binary_operator_ok (ASHIFTRT, QImode, operands)"
   "sar{b}\t%0"
   [(set_attr "type" "ishift1")
    (set (attr "length")
@@ -11927,8 +11931,8 @@
          (const_int 0)))
    (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
        (ashiftrt:QI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && (TARGET_SHIFT1 || optimize_size)
+  "(TARGET_SHIFT1 || optimize_size)
+   && ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (ASHIFTRT, QImode, operands)"
   "sar{b}\t%0"
   [(set_attr "type" "ishift")
@@ -11944,8 +11948,8 @@
                       (match_operand:QI 2 "const1_operand" "I"))
          (const_int 0)))
    (clobber (match_scratch:QI 0 "=q"))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && (TARGET_SHIFT1 || optimize_size)
+  "(TARGET_SHIFT1 || optimize_size)
+   && ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (ASHIFTRT, QImode, operands)"
   "sar{b}\t%0"
   [(set_attr "type" "ishift")
@@ -11962,10 +11966,9 @@
          (const_int 0)))
    (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
        (ashiftrt:QI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFTRT, QImode, operands)
-   && (optimize_size
-       || !TARGET_PARTIAL_FLAG_REG_STALL)"
+  "(optimize_size || !TARGET_PARTIAL_FLAG_REG_STALL)
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (ASHIFTRT, QImode, operands)"
   "sar{b}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "QI")])
@@ -11977,10 +11980,9 @@
                       (match_operand:QI 2 "const_1_to_31_operand" "I"))
          (const_int 0)))
    (clobber (match_scratch:QI 0 "=q"))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (ASHIFTRT, QImode, operands)
-   && (optimize_size
-       || !TARGET_PARTIAL_FLAG_REG_STALL)"
+  "(optimize_size || !TARGET_PARTIAL_FLAG_REG_STALL)
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (ASHIFTRT, QImode, operands)"
   "sar{b}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "QI")])
@@ -12072,8 +12074,9 @@
        (lshiftrt:DI (match_operand:DI 1 "nonimmediate_operand" "0")
                     (match_operand:QI 2 "const1_operand" "")))
    (clobber (reg:CC FLAGS_REG))]
-  "TARGET_64BIT && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)
-   && (TARGET_SHIFT1 || optimize_size)"
+  "TARGET_64BIT
+   && (TARGET_SHIFT1 || optimize_size)
+   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "shr{q}\t%0"
   [(set_attr "type" "ishift")
    (set (attr "length")
@@ -12104,8 +12107,9 @@
          (const_int 0)))
    (set (match_operand:DI 0 "nonimmediate_operand" "=rm")
        (lshiftrt:DI (match_dup 1) (match_dup 2)))]
-  "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode)
+  "TARGET_64BIT
    && (TARGET_SHIFT1 || optimize_size)
+   && ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "shr{q}\t%0"
   [(set_attr "type" "ishift")
@@ -12121,8 +12125,9 @@
                       (match_operand:QI 2 "const1_operand" ""))
          (const_int 0)))
    (clobber (match_scratch:DI 0 "=r"))]
-  "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode)
+  "TARGET_64BIT
    && (TARGET_SHIFT1 || optimize_size)
+   && ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "shr{q}\t%0"
   [(set_attr "type" "ishift")
@@ -12139,10 +12144,10 @@
          (const_int 0)))
    (set (match_operand:DI 0 "nonimmediate_operand" "=rm")
        (lshiftrt:DI (match_dup 1) (match_dup 2)))]
-  "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)
-   && (optimize_size
-       || !TARGET_PARTIAL_FLAG_REG_STALL)"
+  "TARGET_64BIT
+   && (optimize_size || !TARGET_PARTIAL_FLAG_REG_STALL)
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "shr{q}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "DI")])
@@ -12154,10 +12159,10 @@
                       (match_operand:QI 2 "const_int_operand" "e"))
          (const_int 0)))
    (clobber (match_scratch:DI 0 "=r"))]
-  "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)
-   && (optimize_size
-       || !TARGET_PARTIAL_FLAG_REG_STALL)"
+  "TARGET_64BIT
+   && (optimize_size || !TARGET_PARTIAL_FLAG_REG_STALL)
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "shr{q}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "DI")])
@@ -12208,8 +12213,8 @@
        (lshiftrt:SI (match_operand:SI 1 "nonimmediate_operand" "0")
                     (match_operand:QI 2 "const1_operand" "")))
    (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (LSHIFTRT, HImode, operands)
-   && (TARGET_SHIFT1 || optimize_size)"
+  "(TARGET_SHIFT1 || optimize_size)
+   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "shr{l}\t%0"
   [(set_attr "type" "ishift")
    (set (attr "length")
@@ -12222,8 +12227,9 @@
        (lshiftrt:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "0"))
                     (match_operand:QI 2 "const1_operand" "")))
    (clobber (reg:CC FLAGS_REG))]
-  "TARGET_64BIT && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)
-   && (TARGET_SHIFT1 || optimize_size)"
+  "TARGET_64BIT
+   && (TARGET_SHIFT1 || optimize_size)
+   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "shr{l}\t%k0"
   [(set_attr "type" "ishift")
    (set_attr "length" "2")])
@@ -12264,8 +12270,8 @@
          (const_int 0)))
    (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
        (lshiftrt:SI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && (TARGET_SHIFT1 || optimize_size)
+  "(TARGET_SHIFT1 || optimize_size)
+   && ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "shr{l}\t%0"
   [(set_attr "type" "ishift")
@@ -12281,8 +12287,8 @@
                       (match_operand:QI 2 "const1_operand" ""))
          (const_int 0)))
    (clobber (match_scratch:SI 0 "=r"))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && (TARGET_SHIFT1 || optimize_size)
+  "(TARGET_SHIFT1 || optimize_size)
+   && ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "shr{l}\t%0"
   [(set_attr "type" "ishift")
@@ -12296,8 +12302,9 @@
          (const_int 0)))
    (set (match_operand:DI 0 "register_operand" "=r")
        (lshiftrt:DI (zero_extend:DI (match_dup 1)) (match_dup 2)))]
-  "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode)
+  "TARGET_64BIT
    && (TARGET_SHIFT1 || optimize_size)
+   && ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "shr{l}\t%k0"
   [(set_attr "type" "ishift")
@@ -12314,10 +12321,9 @@
          (const_int 0)))
    (set (match_operand:SI 0 "nonimmediate_operand" "=rm")
        (lshiftrt:SI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)
-   && (optimize_size
-       || !TARGET_PARTIAL_FLAG_REG_STALL)"
+  "(optimize_size || !TARGET_PARTIAL_FLAG_REG_STALL)
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "shr{l}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "SI")])
@@ -12329,10 +12335,9 @@
                     (match_operand:QI 2 "const_1_to_31_operand" "I"))
         (const_int 0)))
    (clobber (match_scratch:SI 0 "=r"))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)
-   && (optimize_size
-       || !TARGET_PARTIAL_FLAG_REG_STALL)"
+  "(optimize_size || !TARGET_PARTIAL_FLAG_REG_STALL)
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "shr{l}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "SI")])
@@ -12345,10 +12350,10 @@
          (const_int 0)))
    (set (match_operand:DI 0 "register_operand" "=r")
        (lshiftrt:DI (zero_extend:DI (match_dup 1)) (match_dup 2)))]
-  "TARGET_64BIT && ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)
-   && (optimize_size
-       || !TARGET_PARTIAL_FLAG_REG_STALL)"
+  "TARGET_64BIT
+   && (optimize_size || !TARGET_PARTIAL_FLAG_REG_STALL)
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "shr{l}\t{%2, %k0|%k0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "SI")])
@@ -12366,8 +12371,8 @@
        (lshiftrt:HI (match_operand:HI 1 "nonimmediate_operand" "0")
                     (match_operand:QI 2 "const1_operand" "")))
    (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (LSHIFTRT, HImode, operands)
-   && (TARGET_SHIFT1 || optimize_size)"
+  "(TARGET_SHIFT1 || optimize_size)
+   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "shr{w}\t%0"
   [(set_attr "type" "ishift")
    (set (attr "length")
@@ -12398,8 +12403,8 @@
          (const_int 0)))
    (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
        (lshiftrt:HI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && (TARGET_SHIFT1 || optimize_size)
+  "(TARGET_SHIFT1 || optimize_size)
+   && ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "shr{w}\t%0"
   [(set_attr "type" "ishift")
@@ -12415,8 +12420,8 @@
                       (match_operand:QI 2 "const1_operand" ""))
          (const_int 0)))
    (clobber (match_scratch:HI 0 "=r"))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && (TARGET_SHIFT1 || optimize_size)
+  "(TARGET_SHIFT1 || optimize_size)
+   && ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "shr{w}\t%0"
   [(set_attr "type" "ishift")
@@ -12433,10 +12438,9 @@
          (const_int 0)))
    (set (match_operand:HI 0 "nonimmediate_operand" "=rm")
        (lshiftrt:HI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)
-   && (optimize_size
-       || !TARGET_PARTIAL_FLAG_REG_STALL)"
+  "(optimize_size || !TARGET_PARTIAL_FLAG_REG_STALL)
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "shr{w}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "HI")])
@@ -12448,10 +12452,9 @@
                       (match_operand:QI 2 "const_1_to_31_operand" "I"))
          (const_int 0)))
    (clobber (match_scratch:HI 0 "=r"))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)
-   && (optimize_size
-       || !TARGET_PARTIAL_FLAG_REG_STALL)"
+  "(optimize_size || !TARGET_PARTIAL_FLAG_REG_STALL)
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (LSHIFTRT, HImode, operands)"
   "shr{w}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "HI")])
@@ -12469,8 +12472,8 @@
        (lshiftrt:QI (match_operand:QI 1 "nonimmediate_operand" "0")
                     (match_operand:QI 2 "const1_operand" "")))
    (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (LSHIFTRT, QImode, operands)
-   && (TARGET_SHIFT1 || optimize_size)"
+  "(TARGET_SHIFT1 || optimize_size)
+   && ix86_binary_operator_ok (LSHIFTRT, QImode, operands)"
   "shr{b}\t%0"
   [(set_attr "type" "ishift")
    (set (attr "length")
@@ -12528,8 +12531,8 @@
          (const_int 0)))
    (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
        (lshiftrt:QI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && (TARGET_SHIFT1 || optimize_size)
+  "(TARGET_SHIFT1 || optimize_size)
+   && ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (LSHIFTRT, QImode, operands)"
   "shr{b}\t%0"
   [(set_attr "type" "ishift")
@@ -12545,8 +12548,8 @@
                       (match_operand:QI 2 "const1_operand" ""))
          (const_int 0)))
    (clobber (match_scratch:QI 0 "=q"))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && (TARGET_SHIFT1 || optimize_size)
+  "(TARGET_SHIFT1 || optimize_size)
+   && ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (LSHIFTRT, QImode, operands)"
   "shr{b}\t%0"
   [(set_attr "type" "ishift")
@@ -12563,10 +12566,9 @@
          (const_int 0)))
    (set (match_operand:QI 0 "nonimmediate_operand" "=qm")
        (lshiftrt:QI (match_dup 1) (match_dup 2)))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (LSHIFTRT, QImode, operands)
-   && (optimize_size
-       || !TARGET_PARTIAL_FLAG_REG_STALL)"
+  "(optimize_size || !TARGET_PARTIAL_FLAG_REG_STALL)
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (LSHIFTRT, QImode, operands)"
   "shr{b}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "QI")])
@@ -12578,10 +12580,9 @@
                       (match_operand:QI 2 "const_1_to_31_operand" "I"))
          (const_int 0)))
    (clobber (match_scratch:QI 0 "=q"))]
-  "ix86_match_ccmode (insn, CCGOCmode)
-   && ix86_binary_operator_ok (LSHIFTRT, QImode, operands)
-   && (optimize_size
-       || !TARGET_PARTIAL_FLAG_REG_STALL)"
+  "(optimize_size || !TARGET_PARTIAL_FLAG_REG_STALL)
+   && ix86_match_ccmode (insn, CCGOCmode)
+   && ix86_binary_operator_ok (LSHIFTRT, QImode, operands)"
   "shr{b}\t{%2, %0|%0, %2}"
   [(set_attr "type" "ishift")
    (set_attr "mode" "QI")])
@@ -12637,8 +12638,9 @@
        (rotate:DI (match_operand:DI 1 "nonimmediate_operand" "0")
                   (match_operand:QI 2 "const1_operand" "")))
    (clobber (reg:CC FLAGS_REG))]
-  "TARGET_64BIT && ix86_binary_operator_ok (ROTATE, DImode, operands)
-   && (TARGET_SHIFT1 || optimize_size)"
+  "TARGET_64BIT
+   && (TARGET_SHIFT1 || optimize_size)
+   && ix86_binary_operator_ok (ROTATE, DImode, operands)"
   "rol{q}\t%0"
   [(set_attr "type" "rotate")
    (set (attr "length")
@@ -12671,8 +12673,8 @@
        (rotate:SI (match_operand:SI 1 "nonimmediate_operand" "0")
                   (match_operand:QI 2 "const1_operand" "")))
    (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (ROTATE, SImode, operands)
-   && (TARGET_SHIFT1 || optimize_size)"
+  "(TARGET_SHIFT1 || optimize_size)
+   && ix86_binary_operator_ok (ROTATE, SImode, operands)"
   "rol{l}\t%0"
   [(set_attr "type" "rotate")
    (set (attr "length")
@@ -12686,8 +12688,9 @@
          (rotate:SI (match_operand:SI 1 "register_operand" "0")
                     (match_operand:QI 2 "const1_operand" ""))))
    (clobber (reg:CC FLAGS_REG))]
-  "TARGET_64BIT && ix86_binary_operator_ok (ROTATE, SImode, operands)
-   && (TARGET_SHIFT1 || optimize_size)"
+  "TARGET_64BIT
+   && (TARGET_SHIFT1 || optimize_size)
+   && ix86_binary_operator_ok (ROTATE, SImode, operands)"
   "rol{l}\t%k0"
   [(set_attr "type" "rotate")
    (set_attr "length" "2")])
@@ -12730,8 +12733,8 @@
        (rotate:HI (match_operand:HI 1 "nonimmediate_operand" "0")
                   (match_operand:QI 2 "const1_operand" "")))
    (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (ROTATE, HImode, operands)
-   && (TARGET_SHIFT1 || optimize_size)"
+  "(TARGET_SHIFT1 || optimize_size)
+   && ix86_binary_operator_ok (ROTATE, HImode, operands)"
   "rol{w}\t%0"
   [(set_attr "type" "rotate")
    (set (attr "length")
@@ -12788,8 +12791,8 @@
        (rotate:QI (match_operand:QI 1 "nonimmediate_operand" "0")
                   (match_operand:QI 2 "const1_operand" "")))
    (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (ROTATE, QImode, operands)
-   && (TARGET_SHIFT1 || optimize_size)"
+  "(TARGET_SHIFT1 || optimize_size)
+   && ix86_binary_operator_ok (ROTATE, QImode, operands)"
   "rol{b}\t%0"
   [(set_attr "type" "rotate")
    (set (attr "length")
@@ -12871,8 +12874,9 @@
        (rotatert:DI (match_operand:DI 1 "nonimmediate_operand" "0")
                     (match_operand:QI 2 "const1_operand" "")))
    (clobber (reg:CC FLAGS_REG))]
-  "TARGET_64BIT && ix86_binary_operator_ok (ROTATERT, DImode, operands)
-   && (TARGET_SHIFT1 || optimize_size)"
+  "TARGET_64BIT
+   && (TARGET_SHIFT1 || optimize_size)
+   && ix86_binary_operator_ok (ROTATERT, DImode, operands)"
   "ror{q}\t%0"
   [(set_attr "type" "rotate")
    (set (attr "length")
@@ -12905,8 +12909,8 @@
        (rotatert:SI (match_operand:SI 1 "nonimmediate_operand" "0")
                     (match_operand:QI 2 "const1_operand" "")))
    (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (ROTATERT, SImode, operands)
-   && (TARGET_SHIFT1 || optimize_size)"
+  "(TARGET_SHIFT1 || optimize_size)
+   && ix86_binary_operator_ok (ROTATERT, SImode, operands)"
   "ror{l}\t%0"
   [(set_attr "type" "rotate")
    (set (attr "length")
@@ -12920,8 +12924,9 @@
          (rotatert:SI (match_operand:SI 1 "register_operand" "0")
                       (match_operand:QI 2 "const1_operand" ""))))
    (clobber (reg:CC FLAGS_REG))]
-  "TARGET_64BIT && ix86_binary_operator_ok (ROTATERT, SImode, operands)
-   && (TARGET_SHIFT1 || optimize_size)"
+  "TARGET_64BIT
+   && (TARGET_SHIFT1 || optimize_size)
+   && ix86_binary_operator_ok (ROTATERT, SImode, operands)"
   "ror{l}\t%k0"
   [(set_attr "type" "rotate")
    (set (attr "length")
@@ -12967,8 +12972,8 @@
        (rotatert:HI (match_operand:HI 1 "nonimmediate_operand" "0")
                     (match_operand:QI 2 "const1_operand" "")))
    (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (ROTATERT, HImode, operands)
-   && (TARGET_SHIFT1 || optimize_size)"
+  "(TARGET_SHIFT1 || optimize_size)
+   && ix86_binary_operator_ok (ROTATERT, HImode, operands)"
   "ror{w}\t%0"
   [(set_attr "type" "rotate")
    (set (attr "length")
@@ -13011,8 +13016,8 @@
        (rotatert:QI (match_operand:QI 1 "nonimmediate_operand" "0")
                     (match_operand:QI 2 "const1_operand" "")))
    (clobber (reg:CC FLAGS_REG))]
-  "ix86_binary_operator_ok (ROTATERT, QImode, operands)
-   && (TARGET_SHIFT1 || optimize_size)"
+  "(TARGET_SHIFT1 || optimize_size)
+   && ix86_binary_operator_ok (ROTATERT, QImode, operands)"
   "ror{b}\t%0"
   [(set_attr "type" "rotate")
    (set (attr "length")
@@ -19492,11 +19497,11 @@
    (set (match_operand 1 "register_operand" "")
        (and (match_dup 3) (match_dup 4)))]
   "! TARGET_PARTIAL_REG_STALL && reload_completed
-   /* Ensure that the operand will remain sign-extended immediate.  */
-   && ix86_match_ccmode (insn, INTVAL (operands[4]) >= 0 ? CCNOmode : CCZmode)
    && ! optimize_size
    && ((GET_MODE (operands[1]) == HImode && ! TARGET_FAST_PREFIX)
-       || (GET_MODE (operands[1]) == QImode && TARGET_PROMOTE_QImode))"
+       || (GET_MODE (operands[1]) == QImode && TARGET_PROMOTE_QImode))
+   /* Ensure that the operand will remain sign-extended immediate.  */
+   && ix86_match_ccmode (insn, INTVAL (operands[4]) >= 0 ? CCNOmode : CCZmode)"
   [(parallel [(set (match_dup 0)
                   (match_op_dup 2 [(and:SI (match_dup 3) (match_dup 4))
                                    (const_int 0)]))
@@ -19521,10 +19526,10 @@
                (match_operand:HI 3 "const_int_operand" ""))
           (const_int 0)]))]
   "! TARGET_PARTIAL_REG_STALL && reload_completed
-   /* Ensure that the operand will remain sign-extended immediate.  */
-   && ix86_match_ccmode (insn, INTVAL (operands[3]) >= 0 ? CCNOmode : CCZmode)
    && ! TARGET_FAST_PREFIX
-   && ! optimize_size"
+   && ! optimize_size
+   /* Ensure that the operand will remain sign-extended immediate.  */
+   && ix86_match_ccmode (insn, INTVAL (operands[3]) >= 0 ? CCNOmode : CCZmode)"
   [(set (match_dup 0)
        (match_op_dup 1 [(and:SI (match_dup 2) (match_dup 3))
                         (const_int 0)]))]
@@ -19683,8 +19688,8 @@
    (set (match_operand:SI 0 "memory_operand" "")
         (match_operand:SI 1 "immediate_operand" ""))]
   "! optimize_size
-   && get_attr_length (insn) >= ix86_cost->large_insn
-   && TARGET_SPLIT_LONG_MOVES"
+   && TARGET_SPLIT_LONG_MOVES
+   && get_attr_length (insn) >= ix86_cost->large_insn"
   [(set (match_dup 2) (match_dup 1))
    (set (match_dup 0) (match_dup 2))]
   "")
@@ -19693,8 +19698,9 @@
   [(match_scratch:HI 2 "r")
    (set (match_operand:HI 0 "memory_operand" "")
         (match_operand:HI 1 "immediate_operand" ""))]
-  "! optimize_size && get_attr_length (insn) >= ix86_cost->large_insn
-  && TARGET_SPLIT_LONG_MOVES"
+  "! optimize_size
+   && TARGET_SPLIT_LONG_MOVES
+   && get_attr_length (insn) >= ix86_cost->large_insn"
   [(set (match_dup 2) (match_dup 1))
    (set (match_dup 0) (match_dup 2))]
   "")
@@ -19703,8 +19709,9 @@
   [(match_scratch:QI 2 "q")
    (set (match_operand:QI 0 "memory_operand" "")
         (match_operand:QI 1 "immediate_operand" ""))]
-  "! optimize_size && get_attr_length (insn) >= ix86_cost->large_insn
-  && TARGET_SPLIT_LONG_MOVES"
+  "! optimize_size
+   && TARGET_SPLIT_LONG_MOVES
+   && get_attr_length (insn) >= ix86_cost->large_insn"
   [(set (match_dup 2) (match_dup 1))
    (set (match_dup 0) (match_dup 2))]
   "")
@@ -19716,7 +19723,7 @@
          [(match_operand:SI 2 "memory_operand" "")
           (const_int 0)]))
    (match_scratch:SI 3 "r")]
-  "ix86_match_ccmode (insn, CCNOmode) && ! optimize_size"
+  " ! optimize_size && ix86_match_ccmode (insn, CCNOmode)"
   [(set (match_dup 3) (match_dup 2))
    (set (match_dup 0) (match_op_dup 1 [(match_dup 3) (const_int 0)]))]
   "")
@@ -19736,11 +19743,11 @@
   [(set (match_operand:SI 0 "nonimmediate_operand" "")
        (not:SI (match_operand:SI 1 "nonimmediate_operand" "")))]
   "!optimize_size
-   && peep2_regno_dead_p (0, FLAGS_REG)
    && ((TARGET_NOT_UNPAIRABLE
         && (!MEM_P (operands[0])
             || !memory_displacement_operand (operands[0], SImode)))
-       || (TARGET_NOT_VECTORMODE && long_memory_operand (operands[0], SImode)))"
+       || (TARGET_NOT_VECTORMODE && long_memory_operand (operands[0], SImode)))
+   && peep2_regno_dead_p (0, FLAGS_REG)"
   [(parallel [(set (match_dup 0)
                   (xor:SI (match_dup 1) (const_int -1)))
              (clobber (reg:CC FLAGS_REG))])]
@@ -19750,11 +19757,11 @@
   [(set (match_operand:HI 0 "nonimmediate_operand" "")
        (not:HI (match_operand:HI 1 "nonimmediate_operand" "")))]
   "!optimize_size
-   && peep2_regno_dead_p (0, FLAGS_REG)
    && ((TARGET_NOT_UNPAIRABLE
         && (!MEM_P (operands[0])
             || !memory_displacement_operand (operands[0], HImode)))
-       || (TARGET_NOT_VECTORMODE && long_memory_operand (operands[0], HImode)))"
+       || (TARGET_NOT_VECTORMODE && long_memory_operand (operands[0], HImode)))
+   && peep2_regno_dead_p (0, FLAGS_REG)"
   [(parallel [(set (match_dup 0)
                   (xor:HI (match_dup 1) (const_int -1)))
              (clobber (reg:CC FLAGS_REG))])]
@@ -19764,11 +19771,11 @@
   [(set (match_operand:QI 0 "nonimmediate_operand" "")
        (not:QI (match_operand:QI 1 "nonimmediate_operand" "")))]
   "!optimize_size
-   && peep2_regno_dead_p (0, FLAGS_REG)
    && ((TARGET_NOT_UNPAIRABLE
         && (!MEM_P (operands[0])
             || !memory_displacement_operand (operands[0], QImode)))
-       || (TARGET_NOT_VECTORMODE && long_memory_operand (operands[0], QImode)))"
+       || (TARGET_NOT_VECTORMODE && long_memory_operand (operands[0], QImode)))
+   && peep2_regno_dead_p (0, FLAGS_REG)"
   [(parallel [(set (match_dup 0)
                   (xor:QI (match_dup 1) (const_int -1)))
              (clobber (reg:CC FLAGS_REG))])]