I've added an additional linker relaxation that relaxes two instruction
pc-relative sequences to one instruction gp relative sequences when
possible. This sequence now optimizes the initial gp generation to
mv gp, gp
which is obviously bogus. The fix is to disable relaxations when
setting up gp, preventing the linker from relaxing away this setup code.
csrw mtvec, t0
# initialize global pointer
+.option push
+.option norelax
la gp, __global_pointer$
+.option pop
la tp, _end + 63
and tp, tp, -64
csrwi mie, 0
# initialize global pointer
+.option push
+.option norelax
la gp, __global_pointer$
+.option pop
# initialize stack pointer
la sp, stack_top