Added English language description for lhzupsx instruction

diff --git a/openpower/isa/pifixedloadshift.mdwn b/openpower/isa/pifixedloadshift.mdwn
index 7ef2cbbb169771d04d2febc84a72760f902bb6e4..d2a4445d97cf5715013424db7d282e08b309f99f 100644 (file)
--- a/openpower/isa/pifixedloadshift.mdwn
+++ b/openpower/isa/pifixedloadshift.mdwn
@@ -25,8 +25,8 @@ Pseudo-code:
 
 Description:
 
-    Let the effective address (EA) be the sum of the contents of
-    register RB shifted by (SH+1), and the contents of register RA.
+    Let the effective address (EA) be the contents of
+    register RA shifted by (SH+1).
 
     The byte in storage addressed by EA is loaded into RT[56:63]. 
     RT[0:55] are set to 0.
@@ -43,11 +43,11 @@ Special Registers Altered:
 
 Z23-Form
 
-* lhzupsx RT,RA,RB
+* lhzupsx RT,RA,RB,SH
 
 Pseudo-code:
 
-    EA <- (RA)
+    EA <- (RA)<<(SH+1)
     RT <- ([0] * (XLEN-16)) || MEM(EA, 2)
     RA <- (RA) + (RB)