anv/clear: Pull the stencil write mask from the pipeline
authorJason Ekstrand <jason.ekstrand@intel.com>
Fri, 4 Mar 2016 19:07:27 +0000 (11:07 -0800)
committerJason Ekstrand <jason.ekstrand@intel.com>
Fri, 4 Mar 2016 20:03:00 +0000 (12:03 -0800)
The stencil write mask wasn't getting set at all so we were using whatever
write mask happend to be left over by the application.

src/intel/vulkan/anv_meta_clear.c

index 227f8f35115c46433e50e434deb1fafaffb675fd..c052b8b11f6d43e11755d7669584f579f00a72c6 100644 (file)
@@ -45,7 +45,8 @@ meta_clear_begin(struct anv_meta_saved_state *saved_state,
    anv_meta_save(saved_state, cmd_buffer,
                  (1 << VK_DYNAMIC_STATE_VIEWPORT) |
                  (1 << VK_DYNAMIC_STATE_SCISSOR) |
-                 (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE));
+                 (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE) |
+                 (1 << VK_DYNAMIC_STATE_STENCIL_WRITE_MASK));
 
    cmd_buffer->state.dynamic.viewport.count = 0;
    cmd_buffer->state.dynamic.scissor.count = 0;
@@ -193,6 +194,7 @@ create_pipeline(struct anv_device *device,
             .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
             .dynamicStateCount = 9,
             .pDynamicStates = (VkDynamicState[]) {
+               /* Everything except stencil write mask */
                VK_DYNAMIC_STATE_VIEWPORT,
                VK_DYNAMIC_STATE_SCISSOR,
                VK_DYNAMIC_STATE_LINE_WIDTH,
@@ -200,7 +202,6 @@ create_pipeline(struct anv_device *device,
                VK_DYNAMIC_STATE_BLEND_CONSTANTS,
                VK_DYNAMIC_STATE_DEPTH_BOUNDS,
                VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK,
-               VK_DYNAMIC_STATE_STENCIL_WRITE_MASK,
                VK_DYNAMIC_STATE_STENCIL_REFERENCE,
             },
          },