case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
+ case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS:
return 0;
case PIPE_CAP_MAX_GS_INVOCATIONS:
TGSI_PROPERTY_GS_INVOCATIONS.
* ``PIPE_CAP_MAX_SHADER_BUFFER_SIZE``: Maximum supported size for binding
with set_shader_buffers.
+* ``PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS``: Maximum total number of shader
+ buffers. A value of 0 means the sum of all per-shader stage maximums (see
+ ``PIPE_SHADER_CAP_MAX_SHADER_BUFFERS``).
.. _pipe_capf:
case PIPE_CAP_MAX_GS_INVOCATIONS:
return 32;
+
+ /* shader buffer objects */
case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
return 1 << 27;
+ case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS:
+ return 8;
/* Unsupported features. */
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
PIPE_CAP_MAX_GS_INVOCATIONS,
PIPE_CAP_MAX_SHADER_BUFFER_SIZE,
PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE,
+ PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS,
};
/**
c->ShaderStorageBufferOffsetAlignment =
screen->get_param(screen, PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT);
if (c->ShaderStorageBufferOffsetAlignment) {
- /* for hw atomic counters leaves these at default for now */
- if (ssbo_atomic) {
+ c->MaxCombinedShaderStorageBlocks =
+ MIN2(screen->get_param(screen, PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS),
+ MAX_COMBINED_SHADER_STORAGE_BUFFERS);
+ if (!c->MaxCombinedShaderStorageBlocks) {
c->MaxCombinedShaderStorageBlocks =
c->Program[MESA_SHADER_VERTEX].MaxShaderStorageBlocks +
c->Program[MESA_SHADER_TESS_CTRL].MaxShaderStorageBlocks +