re PR target/53513 ([SH] Add support for fpchg insn and improve fenv support)

gcc/testsuite/
	PR target/53513
	* gcc.target/sh/attr-isr-nosave_low_regs.c: Fix matching of expected
	register push/pop sequences.
	* gcc.target/sh/attr-isr.c: Likewise.
	* gcc.target/sh/attr-isr-trapa.c: Likewise.
	* gcc.target/sh/pragma-isr-nosave_low_regs.c: Likewise.
	* gcc.target/sh/pragma-isr-trapa.c: Likewise.
	* gcc.target/sh/pragma-isr-trapa2.c: Likewise.

From-SVN: r218707

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 761218619775d71fc0a4c92e350f310100133f8c..a4e64b086ae2877e74b5813552ef1292f90d2c18 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,14 @@
+2014-12-13  Oleg Endo  <olegendo@gcc.gnu.org>
+
+       PR target/53513
+       * gcc.target/sh/attr-isr-nosave_low_regs.c: Fix matching of expected
+       register push/pop sequences.
+       * gcc.target/sh/attr-isr.c: Likewise.
+       * gcc.target/sh/attr-isr-trapa.c: Likewise.
+       * gcc.target/sh/pragma-isr-nosave_low_regs.c: Likewise.
+       * gcc.target/sh/pragma-isr-trapa.c: Likewise.
+       * gcc.target/sh/pragma-isr-trapa2.c: Likewise.
+
 2014-12-13  Oleg Endo  <olegendo@gcc.gnu.org>
 
        * gcc.target/sh/sp-switch.c: Match zero or more underscores in

diff --git a/gcc/testsuite/gcc.target/sh/attr-isr-nosave_low_regs.c b/gcc/testsuite/gcc.target/sh/attr-isr-nosave_low_regs.c
index 2f1d5180140ccc9e2a879b658b1fd3f11fe5b47b..f1ad4cdad12d66896740640357ca11e8fc74be2b 100644 (file)
--- a/gcc/testsuite/gcc.target/sh/attr-isr-nosave_low_regs.c
+++ b/gcc/testsuite/gcc.target/sh/attr-isr-nosave_low_regs.c
@@ -1,15 +1,14 @@
 /* A call will clobber all call-saved registers.
    If #pragma nosave_low_regs is specified, do not save/restore r0..r7.
    (On SH3* and SH4* r0..r7 are banked)
-   One of these registers will also do fine to hold the function address.
-   Call-saved registers r8..r13 also don't need to be restored.  */
+   Call-saved registers r8..r13 also don't need to be restored.
+   To test that we look for register push insns such as 'mov.l r0,@-r15'.  */
 /* { dg-do compile { target { { "sh*-*-*" } && nonpic } } }  */
 /* { dg-skip-if "" { "sh*-*-*" } { "-m1*" "-m2*" "-m5*" } { "" } }  */
 /* { dg-options "-O" }  */
 /* { dg-final { scan-assembler-times "rte" 1 } }  */
-/* { dg-final { scan-assembler-not "\[^f\]r\[0-9\]\[ \t\]*," } }  */
-/* { dg-final { scan-assembler-not "\[^f\]r\[89\]" } }  */
-/* { dg-final { scan-assembler-not "\[^f\]r1\[,0-3\]" } }  */
+/* { dg-final { scan-assembler-not "mov.l\tr\[0-9\],@-r15" } }  */
+/* { dg-final { scan-assembler-not "mov.l\tr1\[0-4\],@-r15" } }  */
 /* { dg-final { scan-assembler-times "macl" 2 } }  */
 
 extern void bar (void);

diff --git a/gcc/testsuite/gcc.target/sh/attr-isr-trapa.c b/gcc/testsuite/gcc.target/sh/attr-isr-trapa.c
index e1bc8a4af62d704998ca23f01a599d513d160d8f..3f850ac4686db7558774842f8bdce7a589df0490 100644 (file)
--- a/gcc/testsuite/gcc.target/sh/attr-isr-trapa.c
+++ b/gcc/testsuite/gcc.target/sh/attr-isr-trapa.c
@@ -3,10 +3,8 @@
 /* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } }  */
 /* { dg-options "-O" }  */
 /* { dg-final { scan-assembler-times "rte" 1 } }  */
-/* { dg-final { scan-assembler-not "r\[0-7\]\[ \t,\]\[^\n\]*r15" } }  */
-/* { dg-final { scan-assembler-not "@r15\[^\n\]*r\[0-7\]\n" } }  */
-/* { dg-final { scan-assembler-not "r\[8-9\]" } }  */
-/* { dg-final { scan-assembler-not "r1\[,0-3\]" } }  */
+/* { dg-final { scan-assembler-not "mov.l\tr\[0-9\],@-r15" } }  */
+/* { dg-final { scan-assembler-not "mov.l\tr1\[0-4\],@-r15" } }  */
 /* { dg-final { scan-assembler-not "macl" } }  */
 
 extern void foo (void);

diff --git a/gcc/testsuite/gcc.target/sh/attr-isr.c b/gcc/testsuite/gcc.target/sh/attr-isr.c
index 1373c15f44adb80cc03b3f722b7815edd62c67fa..8e24aa2555d31dc611a03d64a5dd2974bfd68851 100644 (file)
--- a/gcc/testsuite/gcc.target/sh/attr-isr.c
+++ b/gcc/testsuite/gcc.target/sh/attr-isr.c
@@ -1,6 +1,14 @@
+/* The call will clobber r0..r7, which will need not be saved/restored, but
+   not the call-saved registers r8..r14.  Check this by counting the register
+   push insns.  */
 /* { dg-do compile { target { { { sh-*-* sh[1234ble]*-*-* } && { ! sh2a*-*-* } } && nonpic } } } */
 /* { dg-skip-if "" { "sh*-*-*" } { "-m2a*" } { "" } } */
 /* { dg-options "-O" } */
+/* { dg-final { scan-assembler-times "rte" 1} } */
+/* { dg-final { scan-assembler-times "mov.l\tr\[0-7\],@-r15" 8 } }  */
+/* { dg-final { scan-assembler-not "mov.l\tr\[89\],@-r15" } }  */
+/* { dg-final { scan-assembler-not "mov.l\tr1\[0-4\],@-r15" } }  */
+
 extern void foo ();
 
 void
@@ -8,13 +16,3 @@ void
 {
   foo ();
 }
-
-/* { dg-final { scan-assembler-times "rte" 1} } */
-/* The call will clobber r0..r7, which will need not be saved/restored.
-   One of these registers will do fine to hold the function address,
-   hence the all-saved registers r8..r13 don't need to be restored.  */
-/* { dg-final { scan-assembler-times "r15\[+\],\[ \t\]*r\[0-9\]\[ \t\]*\n" 8 } } */
-/* { dg-final { scan-assembler-times "\[^f\]r\[0-9\]\[ \t\]*," 8 } } */
-/* { dg-final { scan-assembler-not "\[^f\]r1\[0-3\]" } } */
-/* { dg-final { scan-assembler-times "macl" 2} } */
-/* { dg-final { scan-assembler-not "rte.*\n.*r15\[+\],r\[0-7\]\n" } } */

diff --git a/gcc/testsuite/gcc.target/sh/pragma-isr-nosave_low_regs.c b/gcc/testsuite/gcc.target/sh/pragma-isr-nosave_low_regs.c
index e1d880d33092f9c4098099b6873ba28cf0b0b6ed..fffc4257b7edbb1d154f1dbe5f8cb9327b1af263 100644 (file)
--- a/gcc/testsuite/gcc.target/sh/pragma-isr-nosave_low_regs.c
+++ b/gcc/testsuite/gcc.target/sh/pragma-isr-nosave_low_regs.c
@@ -1,15 +1,14 @@
 /* A call will clobber all call-saved registers.
    If #pragma nosave_low_regs is specified, do not save/restore r0..r7.
    (On SH3* and SH4* r0..r7 are banked)
-   One of these registers will also do fine to hold the function address.
-   Call-saved registers r8..r13 also don't need to be restored.  */
+   Call-saved registers r8..r14 also don't need to be restored.
+   To test that we look for register push insns such as 'mov.l r0,@-r15'.  */
 /* { dg-do compile { target { { "sh*-*-*" } && nonpic } } }  */
 /* { dg-skip-if "" { "sh*-*-*" } { "-m1*" "-m2*" "-m5*" } { "" } }  */
 /* { dg-options "-O" }  */
 /* { dg-final { scan-assembler-times "rte" 1 } }  */
-/* { dg-final { scan-assembler-not "\[^f\]r\[0-9\]\[ \t\]*," } }  */
-/* { dg-final { scan-assembler-not "\[^f\]r\[89\]" } }  */
-/* { dg-final { scan-assembler-not "\[^f\]r1\[,0-3\]" } }  */
+/* { dg-final { scan-assembler-not "mov.l\tr\[0-9\],@-r15" } }  */
+/* { dg-final { scan-assembler-not "mov.l\tr1\[0-4\],@-r15" } }  */
 /* { dg-final { scan-assembler-times "macl" 2 } }  */
 
 extern void foo (void);

diff --git a/gcc/testsuite/gcc.target/sh/pragma-isr-trapa.c b/gcc/testsuite/gcc.target/sh/pragma-isr-trapa.c
index cc57014dde72f33a77fa29b621c803f6fa57d082..b70be6e4adbd5647f3af915f6b5953d7b4c29ae1 100644 (file)
--- a/gcc/testsuite/gcc.target/sh/pragma-isr-trapa.c
+++ b/gcc/testsuite/gcc.target/sh/pragma-isr-trapa.c
@@ -3,10 +3,8 @@
 /* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } }  */
 /* { dg-options "-O" }  */
 /* { dg-final { scan-assembler-times "rte" 1 } }  */
-/* { dg-final { scan-assembler-not "r\[0-7\]\[ \t,\]\[^\n\]*r15" } }  */
-/* { dg-final { scan-assembler-not "@r15\[^\n\]*r\[0-7\]\n" } }  */
-/* { dg-final { scan-assembler-not "r\[8-9\]" } }  */
-/* { dg-final { scan-assembler-not "r1\[,0-3\]" } }  */
+/* { dg-final { scan-assembler-not "mov.l\tr\[0-9\],@-r15" } }  */
+/* { dg-final { scan-assembler-not "mov.l\tr1\[0-4\],@-r15" } }  */
 /* { dg-final { scan-assembler-not "macl" } }  */
 
 extern void foo (void);

diff --git a/gcc/testsuite/gcc.target/sh/pragma-isr-trapa2.c b/gcc/testsuite/gcc.target/sh/pragma-isr-trapa2.c
index 9a23b976f44d4c1e7c9dce0e2fad91ce804622e4..e2e69993fae3328496d51e6e4161cec15a5fad9c 100644 (file)
--- a/gcc/testsuite/gcc.target/sh/pragma-isr-trapa2.c
+++ b/gcc/testsuite/gcc.target/sh/pragma-isr-trapa2.c
@@ -6,13 +6,12 @@
 /* { dg-skip-if "" { "sh*-*-*" } { "-m1" "-m2" "-m3" "-m4al" "*nofpu" "-m4-340*" "-m4-400*" "-m4-500*" "-m5*" } { "" } }  */
 /* { dg-options "-O" }  */
 /* { dg-final { scan-assembler-times "rte" 1 } }  */
-/* { dg-final { scan-assembler-times "r\[0-7\]\n" 3 } }  */
-/* { dg-final { scan-assembler-not "r\[8-9\]" } }  */
-/* { dg-final { scan-assembler-not "r1\[,0-3\]" } }  */
+/* { dg-final { scan-assembler-not "mov.l\tr\[0-9\],@-r15" } }  */
+/* { dg-final { scan-assembler-not "mov.l\tr1\[0-4\],@-r15" } }  */
 /* { dg-final { scan-assembler-not "macl" } }  */
 
 /* Expect that fpscr needs to be saved, loaded and restored.  */
-/* { dg-final { scan-assembler-times "\[^_\]fpscr" 3 } }  */
+/* { dg-final { scan-assembler-times "\[^_\]fpscr" 4 } }  */
 
 extern void foo (void);