* s390/s390.c: Fix comment typos.
* s390/s390.h: Likewise.
* s390/s390.md: Likewise.
From-SVN: r46557
+2001-10-26 Kazu Hirata <kazu@hxi.com>
+
+ * s390/s390.c: Fix comment typos.
+ * s390/s390.h: Likewise.
+ * s390/s390.md: Likewise.
+
2001-10-26 Alexandre Oliva <aoliva@redhat.com>
* tree-inline.c (WALK_SUBTREE_TAIL): New macro.
LEVEL is the optimization level specified; 2 if `-O2' is
specified, 1 if `-O' is specified, and 0 if neither is specified.
- SIZE is non-zero if `-Os' is specified and zero otherwise. */
+ SIZE is non-zero if `-Os' is specified and zero otherwise. */
void
optimization_options (level, size)
{
/* Access local symbols PC-relative via LARL.
This is the same as in the non-PIC case, so it is
- handled automatically ... */
+ handled automatically ... */
}
else
{
return 0;
}
-/* Returns true if expression DEP_RTX sets a address register
+/* Returns true if expression DEP_RTX sets an address register
used by instruction INSN to address memory. */
static int
register is modified and subsequently used as base or index
register of a memory reference, at least 4 cycles need to pass
between setting and using the register to avoid pipeline stalls.
- A exception is the LA instruction. A address generated by LA can
+ An exception is the LA instruction. An address generated by LA can
be used by introducing only a one cycle stall on the pipeline. */
static int
if (!optimize)
{
/* Stupid register allocation is stupid ...
- It does not always recognize the base register is used. */
+ It does not always recognize the base register is used. */
regs_ever_live[BASE_REGISTER] = 1;
}
if (type)
return int_size_in_bytes (type);
- /* No type info available for some library calls ... */
+ /* No type info available for some library calls ... */
if (mode != BLKmode)
return GET_MODE_SIZE (mode);
((CLASS1) != (CLASS2) && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS))
/* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit
- because the movsi and movsf patterns don't handle r/f moves. */
+ because the movsi and movsf patterns don't handle r/f moves. */
#define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
(GET_MODE_BITSIZE (MODE) < 32 \
is set to reload_obstack, which does not live long enough.
Because of this we cannot use force_const_mem in addsi3.
This leads to problems with gen_add2_insn with a constant greater
- than a short. Because of that we give a addition of greater
+ than a short. Because of that we give an addition of greater
constants a cost of 3 (reload1.c 10096). */
#define BRANCH_COST 1
-/* Add any extra modes needed to represent the condition code. */
+/* Add any extra modes needed to represent the condition code. */
#define EXTRA_CC_MODES \
CC (CCZmode, "CCZ") \
CC (CCAmode, "CCA") \
CC (CCTmode, "CCT")
/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
- return the mode to be used for the comparison. */
+ return the mode to be used for the comparison. */
#define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y))
;
; The following insn is used when it is known that operand one is the stack pointer,
; and operand two is small enough to fit in the displacement field
-; In this case, the result will be a address
+; In this case, the result will be an address
;
(define_insn "addaddr"