r600: don't force Z order

Let the hw decide (early vs late Z)
fixes fdo bug 25092

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>

diff --git a/src/mesa/drivers/dri/r600/r700_state.c b/src/mesa/drivers/dri/r600/r700_state.c
index 41000dc8ce4140e665ac6e0294464490d7e205df..d7420678ff0f7de0079e9b1a0716a4557208416c 100644 (file)
--- a/src/mesa/drivers/dri/r600/r700_state.c
+++ b/src/mesa/drivers/dri/r600/r700_state.c
@@ -202,9 +202,6 @@ static void r700SetDBRenderState(GLcontext * ctx)
 
        SETbit(r700->DB_SHADER_CONTROL.u32All, DUAL_EXPORT_ENABLE_bit);
        SETfield(r700->DB_SHADER_CONTROL.u32All, EARLY_Z_THEN_LATE_Z, Z_ORDER_shift, Z_ORDER_mask);
-       /* XXX not sure if this is required */
-       if (context->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV770)
-               SETbit(r700->DB_RENDER_OVERRIDE.u32All, FORCE_SHADER_Z_ORDER_bit);
        /* XXX need to enable htile for hiz/s */
        SETfield(r700->DB_RENDER_OVERRIDE.u32All, FORCE_DISABLE, FORCE_HIZ_ENABLE_shift, FORCE_HIZ_ENABLE_mask);
        SETfield(r700->DB_RENDER_OVERRIDE.u32All, FORCE_DISABLE, FORCE_HIS_ENABLE0_shift, FORCE_HIS_ENABLE0_mask);