/* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */
#define CNL_MOCS_PTE (1 << 1)
+/* Ice Lake uses same MOCS settings as Cannonlake */
+/* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */
+#define ICL_MOCS_WB (2 << 1)
+/* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */
+#define ICL_MOCS_PTE (1 << 1)
+
uint32_t brw_get_bo_mocs(const struct gen_device_info *devinfo,
struct brw_bo *bo);
#endif
#endif
-#if GEN_GEN == 10
+#if GEN_GEN == 11
+ .VertexBufferMOCS = ICL_MOCS_WB,
+#elif GEN_GEN == 10
.VertexBufferMOCS = CNL_MOCS_WB,
#elif GEN_GEN == 9
.VertexBufferMOCS = SKL_MOCS_WB,