cpu: Don't init simple and inorder CPUs if they are defered.

initCPU() will be called to initialize switched out CPUs for the simple and
inorder CPU models. this patch prevents those CPUs from being initialized
because they should get their state from the active CPU when it is switched
out.

diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc
index 28ffb6896c9c737f7e3b421bffcc638b6dda5ebf..71ad21e1e6c3f12650a54bada8390de3ce746032 100644 (file)
--- a/src/arch/arm/utility.cc
+++ b/src/arch/arm/utility.cc
@@ -47,7 +47,6 @@
 #include "cpu/base.hh"
 #include "cpu/thread_context.hh"
 #include "mem/fs_translating_port_proxy.hh"
-#include "params/BaseCPU.hh"
 #include "sim/full_system.hh"
 
 namespace ArmISA {
@@ -56,10 +55,8 @@ void
 initCPU(ThreadContext *tc, int cpuId)
 {
     // Reset CP15?? What does that mean -- ali
-    
+
     // FPEXC.EN = 0
-    if (tc->getCpuPtr()->params()->defer_registration)
-       return;
 
     static Fault reset = new Reset;
     reset->invoke(tc);

diff --git a/src/cpu/inorder/cpu.cc b/src/cpu/inorder/cpu.cc
index 3c27cf4b24dff03da7343a305d8c879f5765e7eb..5803895641def70c717b8ba0d5565484fddf0535 100644 (file)
--- a/src/cpu/inorder/cpu.cc
+++ b/src/cpu/inorder/cpu.cc
@@ -792,7 +792,7 @@ InOrderCPU::init()
         thread[tid]->initMemProxies(thread[tid]->getTC());
     }
 
-    if (FullSystem) {
+    if (FullSystem && !params()->defer_registration) {
         for (ThreadID tid = 0; tid < numThreads; tid++) {
             ThreadContext *src_tc = threadContexts[tid];
             TheISA::initCPU(src_tc, src_tc->contextId());

diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index f12c2c174b97708c6fba813337811bfd9d80234d..0886b276f7d52ac424e573267de0c863dac8e733 100644 (file)
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -86,7 +86,7 @@ AtomicSimpleCPU::init()
     // Initialise the ThreadContext's memory proxies
     tcBase()->initMemProxies(tcBase());
 
-    if (FullSystem) {
+    if (FullSystem && !params()->defer_registration) {
         ThreadID size = threadContexts.size();
         for (ThreadID i = 0; i < size; ++i) {
             ThreadContext *tc = threadContexts[i];

diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 3d771e56b28e0b6bddecc432de9be2bb653a1949..bae40eba4b80bdfc729d4c05be421c76da8d225e 100644 (file)
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -68,7 +68,7 @@ TimingSimpleCPU::init()
     // Initialise the ThreadContext's memory proxies
     tcBase()->initMemProxies(tcBase());
 
-    if (FullSystem) {
+    if (FullSystem && !params()->defer_registration) {
         for (int i = 0; i < threadContexts.size(); ++i) {
             ThreadContext *tc = threadContexts[i];
             // initialize CPU, including PC