Correct subreg no-op handling for big-endian vec_select.

gcc/

	PR target/84711
	* rtlanal.c (set_noop_p): Constrain on mode change,
	include hard-reg-set.h

gcc/testuite/

	PR target/84711
	* gcc.dg/vect/pr84711.c: New.

From-SVN: r262435

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f30e83d3c42ec18d1b0e4aa31ca4286727415c1c..046ca6e4d0f7ff596cb642cfa93e5db05e28955c 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2018-07-05  Tamar Christina  <tamar.christina@arm.com>
+
+       PR target/84711
+       * rtlanal.c (set_noop_p): Constrain on mode change,
+       include hard-reg-set.h
+
 2018-07-05  Tamar Christina  <tamar.christina@arm.com>
 
        * config/aarch64/aarch64.c (aarch64_expand_movmem): Fix mode size.

diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c
index 8e8ee6eb34940d4a73dd35dd81f0c10b92e8bcb4..9f84d7f2a8c942930f4aa24d856427da78524052 100644 (file)
--- a/gcc/rtlanal.c
+++ b/gcc/rtlanal.c
@@ -35,6 +35,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "recog.h"
 #include "addresses.h"
 #include "rtl-iter.h"
+#include "hard-reg-set.h"
 
 /* Forward declarations */
 static void set_of_1 (rtx, const_rtx, void *);
@@ -1621,8 +1622,9 @@ set_noop_p (const_rtx set)
        if (maybe_ne (rtx_to_poly_int64 (XVECEXP (par, 0, i)), c0 + i))
          return 0;
       return
-       simplify_subreg_regno (REGNO (src0), GET_MODE (src0),
-                              offset, GET_MODE (dst)) == (int) REGNO (dst);
+       REG_CAN_CHANGE_MODE_P (REGNO (dst), GET_MODE (src0), GET_MODE (dst))
+       && simplify_subreg_regno (REGNO (src0), GET_MODE (src0),
+                                 offset, GET_MODE (dst)) == (int) REGNO (dst);
     }
 
   return (REG_P (src) && REG_P (dst)

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 5ff92a414c6fee1b2248a42e46dc542cc0cf7cfb..cea62ecf5d245919c118f525ce36365d7cd11aec 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2018-07-05  Tamar Christina  <tamar.christina@arm.com>
+
+       PR target/84711
+       * gcc.dg/vect/pr84711.c: New.
+
 2018-07-05  Tamar Christina  <tamar.christina@arm.com>
 
        * gcc.target/aarch64/struct_cpy.c: New.

diff --git a/gcc/testsuite/gcc.dg/vect/pr84711.c b/gcc/testsuite/gcc.dg/vect/pr84711.c
new file mode 100644 (file)
index 0000000..dbe61be
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/vect/pr84711.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target vect_int } */
+/* { dg-options "-O2" } */
+
+typedef int v4si
+  __attribute__ ((vector_size (16)));
+
+int fn1 (v4si p)
+{
+  return p[0];
+}
+