freedreno/ir3: Add cat4 mediump opcodes

v2: Reworked to assign half-opcodes in ir3_ra.c (krh).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3737>

diff --git a/src/freedreno/ir3/ir3.h b/src/freedreno/ir3/ir3.h
index fbe28ac3cc17584652541a5099d6dd8edc0ac5d0..c682c6e0db02bf843ad23e0f2dfe6ea8afbfeb97 100644 (file)
--- a/src/freedreno/ir3/ir3.h
+++ b/src/freedreno/ir3/ir3.h
@@ -1463,8 +1463,11 @@ INSTR3(SAD_S32)
 /* cat4 instructions: */
 INSTR1(RCP)
 INSTR1(RSQ)
+INSTR1(HRSQ)
 INSTR1(LOG2)
+INSTR1(HLOG2)
 INSTR1(EXP2)
+INSTR1(HEXP2)
 INSTR1(SIN)
 INSTR1(COS)
 INSTR1(SQRT)

diff --git a/src/freedreno/ir3/ir3_ra.c b/src/freedreno/ir3/ir3_ra.c
index 5a63e77c89eecedcd2d41d7305f13297326fb032..f04db4f29ac1af304fec564414c8f57da04daf08 100644 (file)
--- a/src/freedreno/ir3/ir3_ra.c
+++ b/src/freedreno/ir3/ir3_ra.c
@@ -1110,6 +1110,21 @@ static void fixup_half_instr_dst(struct ir3_instruction *instr)
                        break;
                }
                break;
+       case 4:
+               switch (instr->opc) {
+               case OPC_RSQ:
+                       instr->opc = OPC_HRSQ;
+                       break;
+               case OPC_LOG2:
+                       instr->opc = OPC_HLOG2;
+                       break;
+               case OPC_EXP2:
+                       instr->opc = OPC_HEXP2;
+                       break;
+               default:
+                       break;
+               }
+               break;
        case 5:
                instr->cat5.type = half_type(instr->cat5.type);
                break;