dev: net/i8254xGBe add two more wakeup registers to ignore
authorBjoern A. Zeeb <baz21@cam.ac.uk>
Thu, 9 Feb 2017 23:59:55 +0000 (18:59 -0500)
committerBjoern A. Zeeb <baz21@cam.ac.uk>
Thu, 9 Feb 2017 23:59:55 +0000 (18:59 -0500)
There are drivers writing to WUFC uncondtionally of anything.  In order to
not panic gem5 in these cases, ignore writes to WUFC and WUS as we do for
WUC.  Similarly return 0 (default reset value) on reads.

Testing Done: Booted in FS with such a driver revision which would
previously panic and now boots fine.

Reviewed at http://reviews.gem5.org/r/3791/

Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
src/dev/net/i8254xGBe.cc
src/dev/net/i8254xGBe_defs.hh

index baca0138fb5612b5385c8f83c2aa1d38966e9aa7..70909549a5d5c927cee588bcd20cce8664e3f719 100644 (file)
@@ -240,6 +240,8 @@ IGbE::read(PacketPtr pkt)
         pkt->set<uint32_t>(regs.pba());
         break;
       case REG_WUC:
+      case REG_WUFC:
+      case REG_WUS:
       case REG_LEDCTL:
         pkt->set<uint32_t>(0); // We don't care, so just return 0
         break;
@@ -546,6 +548,8 @@ IGbE::write(PacketPtr pkt)
         regs.pba.txa(64 - regs.pba.rxa());
         break;
       case REG_WUC:
+      case REG_WUFC:
+      case REG_WUS:
       case REG_LEDCTL:
       case REG_FCAL:
       case REG_FCAH:
index 0bb29e56b9ae03dccc238b0743f3d4945a994560..732d1d196eb57776c7304bed4ab33943c2c4c214 100644 (file)
@@ -94,6 +94,8 @@ const uint32_t REG_RAH      = 0x05404;
 const uint32_t REG_VFTA     = 0x05600;
 
 const uint32_t REG_WUC      = 0x05800;
+const uint32_t REG_WUFC     = 0x05808;
+const uint32_t REG_WUS      = 0x05810;
 const uint32_t REG_MANC     = 0x05820;
 const uint32_t REG_SWSM     = 0x05B50;
 const uint32_t REG_FWSM     = 0x05B54;