}
}
+static void
+emit_face_input(struct vc4_compile *c, int attr)
+{
+ c->inputs[attr * 4 + 0] = qir_FSUB(c,
+ qir_uniform_f(c, 1.0),
+ qir_FMUL(c,
+ qir_ITOF(c, qir_FRAG_REV_FLAG(c)),
+ qir_uniform_f(c, 2.0)));
+ c->inputs[attr * 4 + 1] = qir_uniform_f(c, 0.0);
+ c->inputs[attr * 4 + 2] = qir_uniform_f(c, 0.0);
+ c->inputs[attr * 4 + 3] = qir_uniform_f(c, 1.0);
+}
+
static void
emit_tgsi_declaration(struct vc4_compile *c,
struct tgsi_full_declaration *decl)
if (decl->Semantic.Name ==
TGSI_SEMANTIC_POSITION) {
emit_fragcoord_input(c, i);
+ } else if (decl->Semantic.Name == TGSI_SEMANTIC_FACE) {
+ emit_face_input(c, i);
} else if (decl->Semantic.Name == TGSI_SEMANTIC_GENERIC &&
(c->fs_key->point_sprite_mask &
(1 << decl->Semantic.Index))) {
[QOP_FRAG_Y] = { "frag_y", 1, 0 },
[QOP_FRAG_Z] = { "frag_z", 1, 0 },
[QOP_FRAG_W] = { "frag_w", 1, 0 },
+ [QOP_FRAG_REV_FLAG] = { "frag_rev_flag", 1, 0 },
[QOP_TEX_S] = { "tex_s", 0, 2 },
[QOP_TEX_T] = { "tex_t", 0, 2 },
QPU_R_ELEM_QPU = 38,
QPU_R_NOP,
QPU_R_XY_PIXEL_COORD = 41,
- QPU_R_MS_REV_FLAGS = 41,
+ QPU_R_MS_REV_FLAGS = 42,
QPU_R_VPM = 48,
QPU_R_VPM_LD_BUSY,
QPU_R_VPM_LD_WAIT,
qpu_rb(QPU_R_XY_PIXEL_COORD)));
break;
+ case QOP_FRAG_REV_FLAG:
+ queue(c, qpu_a_ITOF(dst,
+ qpu_rb(QPU_R_MS_REV_FLAGS)));
+ break;
+
case QOP_FRAG_Z:
case QOP_FRAG_W:
/* QOP_FRAG_Z/W don't emit instructions, just allocate