Due to these conventions only reduction on operations such as `crand`
and `cror` are meaningful because these have Condition Register Fields
as both input and output.
+Meaningless operations are not prohibited because the cost in hardware
+of doing so is prohibitive, but neither are they `UNDEFINED`. Implementations
+are still required to execute them but are at liberty to optimise out
+any operations that would ultimately be overwritten, as long as Strict
+Program Order is still obvservable by the programmer.
Also bear in mind that 'Reverse Gear' may be enabled, which can be
used in combination with overlapping CR operations to iteratively accumulate
for i in VL-1 downto 0 # reverse gear
CR[4+i].ge &= CR[5+i].ge
+# LD/ST Pack/Unpack Mode
+
+As described in [[sv/normal]],
+Structured Pack/Unpack is similar to VSX `vpack` and `vunpack` except
+generalised not only to a Schedule to be applied to any operation but
+also extended to vec2/3/4.
+
+Like in [[sv/normal]] and [sv/ldst]] operations,
+setting this mode changes the meaning of bits 4-5 in `RM` from being
+`ELWIDTH` to a pair of Pack/Unpack bits.
+*Unlike* in other operation categories however,
+the `SRC_ELWIDTH` bits (6-7) are in use for `SNZ`.
+Therefore **it is not possible to use elwidth overrides and Pack/Unpack**
+at the same time. With elwidths being meaningless for CR Fields this was
+considered an acceptable compromise: the operations particularly affected
+are extremely weird CR ops.
+
# Unusual and quirky CR operations
## cmp and other compare ops
cmpli BF,L,RA,UI
cmpeqb BF,RA,RB
-With `ELWIDTH` applying to the source operands this is perfectly fine.
+With `ELWIDTH` applying to the source GPR operands this is perfectly fine
+(caveat: except if Pack/Unpack is needed as well)
## crweird operations