ac/gpu_info: add pc_lines and use it in radeonsi

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index 82a6cfb825df09da09f1e78055ddae9017eee28a..b8230fd03b101af8dc070e76ec1f66d849d4b1ef 100644 (file)
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -639,6 +639,8 @@ bool ac_query_gpu_info(int fd, void *dev_p,
                        assert(0);
                }
 
+               info->pc_lines = pc_lines;
+
                if (info->chip_class >= GFX10) {
                        info->pbb_max_alloc_count = pc_lines / 3;
                } else {
@@ -758,6 +760,7 @@ void ac_print_gpu_info(struct radeon_info *info)
        printf("    num_tcc_blocks = %i\n", info->num_tcc_blocks);
        printf("    tcc_cache_line_size = %u\n", info->tcc_cache_line_size);
        printf("    tcc_harvested = %u\n", info->tcc_harvested);
+       printf("    pc_lines = %u\n", info->pc_lines);
 
        printf("CP info:\n");
        printf("    gfx_ib_pad_with_type2 = %i\n", info->gfx_ib_pad_with_type2);

diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
index 412332ea70d1df74a195af90bf3ad8ba9e8db701..08ded09030a3fef5d5599eab51850608e881f32f 100644 (file)
--- a/src/amd/common/ac_gpu_info.h
+++ b/src/amd/common/ac_gpu_info.h
@@ -96,6 +96,7 @@ struct radeon_info {
        uint32_t                    num_tcc_blocks;
        uint32_t                    tcc_cache_line_size;
        bool                        tcc_harvested;
+       unsigned                    pc_lines;
 
        /* CP info. */
        bool                        gfx_ib_pad_with_type2;

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 8d2dca1d1971eae64906d5d5ad780880dbdb794b..4211ef4014a7615f43a65c1d27efa95424330887 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -5668,7 +5668,7 @@ static void si_init_config(struct si_context *sctx)
                /* TODO: For culling, replace 128 with 256. */
                si_pm4_set_reg(pm4, R_030980_GE_PC_ALLOC,
                               S_030980_OVERSUB_EN(1) |
-                              S_030980_NUM_PC_LINES(128 * sscreen->info.max_se - 1));
+                              S_030980_NUM_PC_LINES(sscreen->info.pc_lines / 4 - 1));
        }
 
        if (sctx->chip_class >= GFX8) {