+2018-12-17 Senthil Kumar Selvaraj <senthilkumar.selvaraj@microchip.com>
+
+ PR rtl-optimization/88253
+ * combine.c (combine_simplify_rtx): Test for side-effects before
+ substituting by zero.
+
2018-12-17 Richard Sandiford <richard.sandiford@arm.com>
* doc/invoke.texi (-fversion-loops-for-strides): Document
&& known_eq (subreg_lowpart_offset (int_mode, int_op0_mode),
SUBREG_BYTE (x))
&& HWI_COMPUTABLE_MODE_P (int_op0_mode)
- && (nonzero_bits (SUBREG_REG (x), int_op0_mode)
- & GET_MODE_MASK (int_mode)) == 0)
+ && ((nonzero_bits (SUBREG_REG (x), int_op0_mode)
+ & GET_MODE_MASK (int_mode)) == 0)
+ && !side_effects_p (SUBREG_REG (x)))
return CONST0_RTX (int_mode);
}
+2018-12-17 Senthil Kumar Selvaraj <senthilkumar.selvaraj@microchip.com>
+
+ PR rtl-optimization/88253
+ * gcc.target/avr/pr88253.c: New test.
+
2018-12-17 Richard Sandiford <richard.sandiford@arm.com>
* gcc.dg/loop-versioning-1.c: New test.
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-Os -w" } */
+
+static int aRead() __attribute__((always_inline));
+static int aRead() {
+ unsigned char h,l;
+ l = (*(volatile unsigned char *)(0x78)) ;
+ h = (*(volatile unsigned char *)(0x79)) ;
+ return (h<<8) | l;
+}
+
+int main() {
+ volatile unsigned char x;
+ x = aRead()^42;
+ }
+ /* { dg-final { scan-assembler "lds r\\d+,121" } } */