back.verilog: run proc_prune for much cleaner output.

This is a very new Yosys feature, and will require a Yosys build
newer than YosysHQ/yosys@44bcb7a1.

diff --git a/nmigen/back/verilog.py b/nmigen/back/verilog.py
index cb099c98e7ecbf34ffb4319b100d8359f352f824..444e1247b4ce7fd63bbc317fddb13cc42c5fdd38 100644 (file)
--- a/nmigen/back/verilog.py
+++ b/nmigen/back/verilog.py
@@ -36,6 +36,7 @@ def convert(*args, strip_src=False, **kwargs):
 read_ilang <<rtlil
 {}
 rtlil
+proc_prune
 proc_init
 proc_arst
 proc_dff