+2017-01-19 Matthew Fortune <matthew.fortune@imgtec.com>
+ Yunqiang Su <yunqiang.su@imgtec.com>
+
+ * config.gcc (supported_defaults): Add madd4.
+ (with_madd4): Add validation.
+ (all_defaults): Add madd4.
+ * config/mips/mips.opt (mmadd4): New option.
+ * gcc/config/mips/mips.h (OPTION_DEFAULT_SPECS): Add a default for
+ mmadd4.
+ (TARGET_CPU_CPP_BUILTINS): Add builtin_define for
+ __mips_no_madd4.
+ (ISA_HAS_UNFUSED_MADD4): Gate with mips_madd4.
+ (ISA_HAS_FUSED_MADD4): Likewise.
+ * gcc/doc/invoke.texi (-mmadd4): Document the new option.
+ * gcc/doc/install.texi (--with-madd4): Document the new option.
+
2017-01-19 Jiong Wang <jiong.wang@arm.com>
* config/aarch64/aarch64-builtins.c (enum aarch64_builtins): New
;;
mips*-*-*)
- supported_defaults="abi arch arch_32 arch_64 float fpu nan fp_32 odd_spreg_32 tune tune_32 tune_64 divide llsc mips-plt synci lxc1-sxc1"
+ supported_defaults="abi arch arch_32 arch_64 float fpu nan fp_32 odd_spreg_32 tune tune_32 tune_64 divide llsc mips-plt synci lxc1-sxc1 madd4"
case ${with_float} in
"" | soft | hard)
exit 1
;;
esac
+
+ case ${with_madd4} in
+ yes)
+ with_madd4=madd4
+ ;;
+ no)
+ with_madd4=no-madd4
+ ;;
+ "")
+ ;;
+ *)
+ echo "Unknown madd4 type used in --with-madd4" 1>&2
+ exit 1
+ ;;
+ esac
;;
nds32*-*-*)
esac
t=
-all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 divide llsc mips-plt synci tls lxc1-sxc1"
+all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu nan fp_32 odd_spreg_32 divide llsc mips-plt synci tls lxc1-sxc1 madd4"
for option in $all_defaults
do
eval "val=\$with_"`echo $option | sed s/-/_/g`
builtin_define ("__GCC_HAVE_BUILTIN_MIPS_CACHE"); \
if (!ISA_HAS_LXC1_SXC1) \
builtin_define ("__mips_no_lxc1_sxc1"); \
+ if (!ISA_HAS_UNFUSED_MADD4 && !ISA_HAS_FUSED_MADD4) \
+ builtin_define ("__mips_no_madd4"); \
} \
while (0)
{"llsc", "%{!mllsc:%{!mno-llsc:-m%(VALUE)}}" }, \
{"mips-plt", "%{!mplt:%{!mno-plt:-m%(VALUE)}}" }, \
{"synci", "%{!msynci:%{!mno-synci:-m%(VALUE)}}" }, \
- {"lxc1-sxc1", "%{!mlxc1-sxc1:%{!mno-lxc1-sxc1:-m%(VALUE)}}" } \
+ {"lxc1-sxc1", "%{!mlxc1-sxc1:%{!mno-lxc1-sxc1:-m%(VALUE)}}" }, \
+ {"madd4", "%{!mmadd4:%{!mno-madd4:-m%(VALUE)}}" } \
/* A spec that infers the:
-mnan=2008 setting from a -mips argument,
/* ISA has 4 operand fused madd instructions of the form
'd = [+-] (a * b [+-] c)'. */
-#define ISA_HAS_FUSED_MADD4 (TARGET_MIPS8000 || TARGET_LOONGSON_3A)
+#define ISA_HAS_FUSED_MADD4 (mips_madd4 \
+ && (TARGET_MIPS8000 \
+ || TARGET_LOONGSON_3A))
/* ISA has 4 operand unfused madd instructions of the form
'd = [+-] (a * b [+-] c)'. */
-#define ISA_HAS_UNFUSED_MADD4 (ISA_HAS_FP4 \
+#define ISA_HAS_UNFUSED_MADD4 (mips_madd4 \
+ && ISA_HAS_FP4 \
&& !TARGET_MIPS8000 \
&& !TARGET_LOONGSON_3A)
Target Report Var(mips_lxc1_sxc1) Init(1)
Use lwxc1/swxc1/ldxc1/sdxc1 instructions where applicable.
+mmadd4
+Target Report Var(mips_madd4) Init(1)
+Use 4-operand madd.s/madd.d and related instructions where applicable.
+
mtune=
Target RejectNegative Joined Var(mips_tune_option) ToLower Enum(mips_arch_opt_value)
-mtune=PROCESSOR Optimize the output for PROCESSOR.
pure 32-bit environment and can hold true in a 64-bit environment if
the address space is accurately set to be 32-bit for o32 and n32.
+@item --with-madd4
+On MIPS targets, make @option{-mmadd4} the default when no
+@option{-mno-madd4} option is passed. This is the default.
+
+@item --without-madd4
+On MIPS targets, make @option{-mno-madd4} the default when no
+@option{-mmadd4} option is passed. The @code{madd4} instruction
+family can be problematic when targeting a combination of cores that
+implement these instructions differently. There are two known cores
+that implement these as fused operations instead of unfused (where
+unfused is normally expected). Disabling these instructions is the
+only way to ensure compatible code is generated; this will incur
+a performance penalty.
+
@item --with-mips-plt
On MIPS targets, make use of copy relocations and PLTs.
These features are extensions to the traditional
-mcompact-branches=@var{policy} @gol
-mfp-exceptions -mno-fp-exceptions @gol
-mvr4130-align -mno-vr4130-align -msynci -mno-synci @gol
--mlxc1-sxc1 -mno-lxc1-sxc1 @gol
+-mlxc1-sxc1 -mno-lxc1-sxc1 -mmadd4 -mno-madd4 @gol
-mrelax-pic-calls -mno-relax-pic-calls -mmcount-ra-address @gol
-mframe-header-opt -mno-frame-header-opt}
When applicable, enable (disable) the generation of @code{lwxc1},
@code{swxc1}, @code{ldxc1}, @code{sdxc1} instructions. Enabled by default.
+@item -mmadd4
+@itemx -mno-madd4
+@opindex mmadd4
+When applicable, enable (disable) the generation of 4-operand @code{madd.s},
+@code{madd.d} and related instructions. Enabled by default.
+
@end table
@node MMIX Options
+2017-01-19 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * gcc.target/mips/madd4-1.c: New file.
+ * gcc.target/mips/madd4-2.c: Likewise.
+ * gcc.target/mips/mips.exp (mips_option_groups): Add ghost option
+ HAS_MADD4.
+ (mips_option_groups): Add -m[no-]madd4.
+ (mips-dg-init): Detect default -mno-madd4.
+ (mips-dg-options): Handle HAS_MADD4 arch upgrade/downgrade.
+ * gcc.target/mips/mips-ps-type.c: Add -mmadd4 test option.
+ * gcc.target/mips/mips-ps-type-2.c: Likewise.
+ * gcc.target/mips/nmadd-1.c: Likewise.
+ * gcc.target/mips/nmadd-2.c: Likewise.
+ * gcc.target/mips/nmadd-3.c: Likewise.
+
2017-01-19 Jiong Wang <jiong.wang@arm.com>
* gcc.target/aarch64/return_address_sign_1.c: New testcase for no
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-ffast-math -mno-madd4 (HAS_MADD4) -mhard-float" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+/* { dg-final { scan-assembler-not "\tmadd.s\t" } } */
+
+#ifndef __mips_no_madd4
+#error missing definition of __mips_no_madd4
+#endif
+
+NOMIPS16 float
+madd4 (float f, float g, float h)
+{
+ return (f * g) + h;
+}
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-ffast-math -mmadd4 (HAS_MADD4) -mhard-float" } */
+/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
+/* { dg-final { scan-assembler "\tmadd.s\t" } } */
+
+#ifdef __mips_no_madd4
+#error unexpected definition of __mips_no_madd4
+#endif
+
+NOMIPS16 float
+madd4 (float f, float g, float h)
+{
+ return (f * g) + h;
+}
/* Test v2sf calculations. The nmadd and nmsub patterns need
-ffinite-math-only. */
/* { dg-do compile } */
-/* { dg-options "(HAS_MADDPS) -mgp32 -mpaired-single -ffinite-math-only forbid_cpu=octeon.*" } */
+/* { dg-options "(HAS_MADDPS) -mmadd4 -mgp32 -mpaired-single -ffinite-math-only forbid_cpu=octeon.*" } */
/* { dg-skip-if "nmadd and nmsub need combine" { *-*-* } { "-O0" } { "" } } */
/* { dg-final { scan-assembler "\tcvt.ps.s\t" } } */
/* { dg-final { scan-assembler "\tmov.ps\t" } } */
/* Test v2sf calculations. The nmadd and nmsub patterns need
-ffinite-math-only. */
/* { dg-do compile } */
-/* { dg-options "-mpaired-single -mgp64 -ffinite-math-only forbid_cpu=octeon.*" } */
+/* { dg-options "-mpaired-single -mmadd4 -mgp64 -ffinite-math-only forbid_cpu=octeon.*" } */
/* { dg-skip-if "nmadd and nmsub need combine" { *-*-* } { "-O0" } { "" } } */
/* { dg-final { scan-assembler "\tcvt.ps.s\t" } } */
/* { dg-final { scan-assembler "\tmov.ps\t" } } */
ldc "HAS_LDC"
movn "HAS_MOVN"
madd "HAS_MADD"
+ madd4_ghost "HAS_MADD4"
maddps "HAS_MADDPS"
lsa "(|!)HAS_LSA"
lxc1 "HAS_LXC1"
local-sdata
long-calls
lxc1-sxc1
+ madd4
paired-single
plt
shared
"-mlxc1-sxc1"
#endif
+ #ifdef __mips_no_madd4
+ "-mno-madd4"
+ #else
+ "-mmadd4"
+ #endif
+
#ifdef __mips_synci
"-msynci",
#else
#
} elseif { $isa < 4
&& ([mips_have_test_option_p options "HAS_LXC1"]
+ || [mips_have_test_option_p options "HAS_MADD4"]
|| [mips_have_test_option_p options "HAS_MOVN"]) } {
mips_make_test_option options "-mips4"
# We need MIPS III or higher for:
|| [mips_have_test_option_p options "-mfix-r10000"]
|| [mips_have_test_option_p options "NOT_HAS_DMUL"]
|| [mips_have_test_option_p options "HAS_LXC1"]
- || [mips_have_test_option_p options "HAS_MOVN"]
|| [mips_have_test_option_p options "HAS_MADD"]
+ || [mips_have_test_option_p options "HAS_MADD4"]
+ || [mips_have_test_option_p options "HAS_MOVN"]
|| [mips_have_test_option_p options "-mpaired-single"]
|| [mips_have_test_option_p options "-mnan=legacy"]
|| [mips_have_test_option_p options "-mabs=legacy"]
/* { dg-do compile } */
-/* { dg-options "-ffast-math isa=4 -mhard-float" } */
+/* { dg-options "-ffast-math -mmadd4 isa=4 -mhard-float" } */
/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
/* { dg-final { scan-assembler "\tnmadd.s\t" } } */
/* { dg-final { scan-assembler "\tnmadd.d\t" } } */
/* { dg-do compile } */
-/* { dg-options "-fno-fast-math -ffinite-math-only isa=4 -mhard-float" } */
+/* { dg-options "-fno-fast-math -ffinite-math-only -mmadd4 isa=4 -mhard-float" } */
/* { dg-skip-if "code quality test" { *-*-* } { "-O0" } { "" } } */
/* { dg-final { scan-assembler "\tnmadd.s\t" } } */
/* { dg-final { scan-assembler "\tnmadd.d\t" } } */
/* The same code as nmadd-2.c, but compiled with -fno-finite-math-only.
We can't use nmadd and nmsub in that case. */
/* { dg-do compile } */
-/* { dg-options "-fno-fast-math -fno-finite-math-only isa=4 -mhard-float" } */
+/* { dg-options "-fno-fast-math -fno-finite-math-only -mmadd4 isa=4 -mhard-float" } */
/* { dg-final { scan-assembler-not "\tnmadd" } } */
/* { dg-final { scan-assembler-not "\tnmsub" } } */