+2016-11-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
+
+ * config/arm/arm.c (legitimize_pic_address): Change to use
+ rtx_insn * as the type of variables.
+ (arm_pic_static_addr): Likewise.
+ (arm_emit_movpair): Likewise.
+ * config/c6x/c6x.c (reorg_split_calls): Likewise.
+ * config/darwin.c (machopic_legitimize_pic_address): Likewise.
+ * config/frv/frv.c (frv_optimize_membar_local): Likewise.
+ * config/frv/frv.md: Likewise.
+ * config/i386/i386-protos.h: Likewise.
+ * config/i386/i386.c (ix86_expand_split_stack_prologue):
+ Likewise.
+ (ix86_split_fp_branch): Likewise.
+ (predict_jump): Likewise.
+ * config/ia64/ia64.c: Likewise.
+ * config/mcore/mcore.c: Likewise.
+ * config/rs6000/rs6000.c (rs6000_legitimize_tls_address):
+ Likewise.
+ * config/s390/s390.c: Likewise.
+ * config/s390/s390.md: Likewise.
+ * config/spu/spu.md: Likewise.
+ * config/tilegx/tilegx.c (tilegx_legitimize_tls_address):
+ Likewise.
+ * lower-subreg.c (resolve_simple_move): Likewise.
+
2016-11-20 Jeff Law <law@redhat.com>
PR target/48551
static void arm_asm_trampoline_template (FILE *);
static void arm_trampoline_init (rtx, tree, rtx);
static rtx arm_trampoline_adjust_address (rtx);
-static rtx arm_pic_static_addr (rtx orig, rtx reg);
+static rtx_insn *arm_pic_static_addr (rtx orig, rtx reg);
static bool cortex_a9_sched_adjust_cost (rtx_insn *, int, rtx_insn *, int *);
static bool xscale_sched_adjust_cost (rtx_insn *, int, rtx_insn *, int *);
static bool fa726te_sched_adjust_cost (rtx_insn *, int, rtx_insn *, int *);
if (GET_CODE (orig) == SYMBOL_REF
|| GET_CODE (orig) == LABEL_REF)
{
- rtx insn;
-
if (reg == 0)
{
gcc_assert (can_create_pseudo_p ());
same segment as the GOT. Unfortunately, the flexibility of linker
scripts means that we can't be sure of that in general, so assume
that GOTOFF is never valid on VxWorks. */
+ rtx_insn *insn;
if ((GET_CODE (orig) == LABEL_REF
|| (GET_CODE (orig) == SYMBOL_REF &&
SYMBOL_REF_LOCAL_P (orig)))
}
/* Generate code to load the address of a static var when flag_pic is set. */
-static rtx
+static rtx_insn *
arm_pic_static_addr (rtx orig, rtx reg)
{
- rtx l1, labelno, offset_rtx, insn;
+ rtx l1, labelno, offset_rtx;
gcc_assert (flag_pic);
UNSPEC_SYMBOL_OFFSET);
offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
- insn = emit_insn (gen_pic_load_addr_unified (reg, offset_rtx, labelno));
- return insn;
+ return emit_insn (gen_pic_load_addr_unified (reg, offset_rtx, labelno));
}
/* Return nonzero if X is valid as an ARM state addressing register. */
void
arm_emit_movpair (rtx dest, rtx src)
{
- rtx insn;
-
/* If the src is an immediate, simplify it. */
if (CONST_INT_P (src))
{
emit_set_insn (gen_rtx_ZERO_EXTRACT (SImode, dest, GEN_INT (16),
GEN_INT (16)),
GEN_INT ((val >> 16) & 0x0000ffff));
- insn = get_last_insn ();
+ rtx_insn *insn = get_last_insn ();
set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src));
}
return;
}
emit_set_insn (dest, gen_rtx_HIGH (SImode, src));
emit_set_insn (dest, gen_rtx_LO_SUM (SImode, dest, src));
- insn = get_last_insn ();
+ rtx_insn *insn = get_last_insn ();
set_unique_reg_note (insn, REG_EQUAL, copy_rtx (src));
}
/* Emit a NOP instruction for CYCLES cycles after insn AFTER. Return it. */
static rtx_insn *
-emit_nop_after (int cycles, rtx after)
+emit_nop_after (int cycles, rtx_insn *after)
{
rtx_insn *insn;
else
{
rtx x1, x2;
- rtx after2 = find_next_cycle_insn (after1, this_clock + 2);
+ rtx_insn *after2 = find_next_cycle_insn (after1,
+ this_clock + 2);
if (after2 == NULL_RTX)
after2 = after1;
x2 = gen_movsi_lo_sum (reg, reg, labelref);
? reg
: gen_reg_rtx (Pmode));
rtx mem;
- rtx insn;
rtx sum;
sum = gen_rtx_HIGH (Pmode, offset);
gen_rtx_LO_SUM (Pmode,
hi_sum_reg,
copy_rtx (offset)));
- insn = emit_insn (gen_rtx_SET (reg, mem));
+ rtx_insn *insn = emit_insn (gen_rtx_SET (reg, mem));
set_unique_reg_note (insn, REG_EQUAL, pic_ref);
pic_ref = reg;
rtx_insn **last_membar)
{
HARD_REG_SET used_regs;
- rtx next_membar, set;
- rtx_insn *insn;
+ rtx set;
+ rtx_insn *insn, *next_membar;
bool next_is_end_p;
/* NEXT_IO is the next I/O operation to be performed after the current
""
"
{
- rtx insn;
-
- insn = emit_insn (gen_symGOT2reg_i (operands[0], operands[1], operands[2], operands[3]));
+ rtx_insn *insn = emit_insn (gen_symGOT2reg_i (operands[0], operands[1],
+ operands[2], operands[3]));
MEM_READONLY_P (SET_SRC (PATTERN (insn))) = 1;
""
"
{
- rtx insn = emit_insn (gen_symGOTOFF2reg_i (operands[0], operands[1], operands[2], operands[3]));
+ rtx_insn *insn = emit_insn (gen_symGOTOFF2reg_i (operands[0], operands[1],
+ operands[2], operands[3]));
set_unique_reg_note (insn, REG_EQUAL, operands[1]);
""
"
{
- rtx insn;
-
if (!can_create_pseudo_p ())
operands[4] = operands[0];
else
emit_insn (frv_gen_GPsym2reg (operands[4], operands[2]));
- insn = emit_insn (gen_symGOTOFF2reg_i (operands[0], operands[1],
- operands[4], operands[3]));
+ rtx_insn *insn = emit_insn (gen_symGOTOFF2reg_i (operands[0], operands[1],
+ operands[4], operands[3]));
set_unique_reg_note (insn, REG_EQUAL, operands[1]);
""
"
{
- rtx insn;
-
if (!can_create_pseudo_p ())
{
emit_insn (gen_symGOT2reg (operands[0], operands[1], operands[2],
emit_insn (frv_gen_GPsym2reg (operands[4], operands[2]));
- insn = emit_insn (gen_symGOTOFF2reg_hilo (operands[0], operands[1],
- operands[4], operands[3]));
+ rtx_insn *insn = emit_insn (gen_symGOTOFF2reg_hilo (operands[0], operands[1],
+ operands[4], operands[3]));
set_unique_reg_note (insn, REG_EQUAL, operands[1]);
extern void split_double_mode (machine_mode, rtx[], int, rtx[], rtx[]);
extern const char *output_set_got (rtx, rtx);
-extern const char *output_387_binary_op (rtx, rtx*);
-extern const char *output_387_reg_move (rtx, rtx*);
+extern const char *output_387_binary_op (rtx_insn *, rtx*);
+extern const char *output_387_reg_move (rtx_insn *, rtx*);
extern const char *output_fix_trunc (rtx_insn *, rtx*, bool);
-extern const char *output_fp_compare (rtx, rtx*, bool, bool);
+extern const char *output_fp_compare (rtx_insn *, rtx*, bool, bool);
extern const char *output_adjust_stack_and_probe (rtx);
extern const char *output_probe_stack_range (rtx, rtx);
HOST_WIDE_INT allocate;
unsigned HOST_WIDE_INT args_size;
rtx_code_label *label;
- rtx limit, current, jump_insn, allocate_rtx, call_insn, call_fusage;
+ rtx limit, current, allocate_rtx, call_insn, call_fusage;
rtx scratch_reg = NULL_RTX;
rtx_code_label *varargs_label = NULL;
rtx fn;
}
ix86_expand_branch (GEU, current, limit, label);
- jump_insn = get_last_insn ();
+ rtx_insn *jump_insn = get_last_insn ();
JUMP_LABEL (jump_insn) = label;
/* Mark the jump as very likely to be taken. */
#endif
const char *
-output_387_binary_op (rtx insn, rtx *operands)
+output_387_binary_op (rtx_insn *insn, rtx *operands)
{
static char buf[40];
const char *p;
should be used. UNORDERED_P is true when fucom should be used. */
const char *
-output_fp_compare (rtx insn, rtx *operands, bool eflags_p, bool unordered_p)
+output_fp_compare (rtx_insn *insn, rtx *operands, bool eflags_p, bool unordered_p)
{
int stack_top_dies;
rtx cmp_op0, cmp_op1;
rtx target1, rtx target2, rtx tmp)
{
rtx condition;
- rtx i;
+ rtx_insn *i;
if (target2 != pc_rtx)
{
static void
predict_jump (int prob)
{
- rtx insn = get_last_insn ();
+ rtx_insn *insn = get_last_insn ();
gcc_assert (JUMP_P (insn));
add_int_reg_note (insn, REG_BR_PROB, prob);
}
to OPERANDS[0]. */
const char *
-output_387_reg_move (rtx insn, rtx *operands)
+output_387_reg_move (rtx_insn *insn, rtx *operands)
{
if (REG_P (operands[0]))
{
??? When cycle display notes are implemented, update this. */
static void
-ia64_emit_insn_before (rtx insn, rtx before)
+ia64_emit_insn_before (rtx insn, rtx_insn *before)
{
emit_insn_before (insn, before);
}
new one. Return the new insn if emitted. */
static rtx_insn *
-emit_new_cond_insn (rtx insn, int cond)
+emit_new_cond_insn (rtx_insn *insn, int cond)
{
rtx c_insn = 0;
rtx pat, dst, src;
rs6000_emit_move (got, gsym, Pmode);
else
{
- rtx mem, lab, last;
+ rtx mem, lab;
tmp1 = gen_reg_rtx (Pmode);
tmp2 = gen_reg_rtx (Pmode);
if (TARGET_LINK_STACK)
emit_insn (gen_addsi3 (tmp1, tmp1, GEN_INT (4)));
emit_move_insn (tmp2, mem);
- last = emit_insn (gen_addsi3 (got, tmp1, tmp2));
+ rtx_insn *last = emit_insn (gen_addsi3 (got, tmp1, tmp2));
set_unique_reg_note (last, REG_EQUAL, gsym);
}
}
/* Emit a conditional jump to LABEL for condition code mask MASK using
comparsion operator COMPARISON. Return the emitted jump insn. */
-static rtx
+static rtx_insn *
s390_emit_ccraw_jump (HOST_WIDE_INT mask, enum rtx_code comparison, rtx label)
{
rtx temp;
(clobber (match_dup 4))]
"TARGET_ZARCH"
{
- rtx insn, div_equal, mod_equal;
+ rtx div_equal, mod_equal;
+ rtx_insn *insn;
div_equal = gen_rtx_DIV (DImode, operands[1], operands[2]);
mod_equal = gen_rtx_MOD (DImode, operands[1], operands[2]);
(clobber (match_dup 4))]
"TARGET_ZARCH"
{
- rtx insn, div_equal, mod_equal, equal;
+ rtx div_equal, mod_equal, equal;
+ rtx_insn *insn;
div_equal = gen_rtx_UDIV (DImode, operands[1], operands[2]);
mod_equal = gen_rtx_UMOD (DImode, operands[1], operands[2]);
(clobber (match_dup 4))]
"!TARGET_ZARCH"
{
- rtx insn, div_equal, mod_equal, equal;
+ rtx div_equal, mod_equal, equal;
+ rtx_insn *insn;
div_equal = gen_rtx_DIV (SImode, operands[1], operands[2]);
mod_equal = gen_rtx_MOD (SImode, operands[1], operands[2]);
(clobber (match_dup 4))]
"!TARGET_ZARCH && TARGET_CPU_ZARCH"
{
- rtx insn, div_equal, mod_equal, equal;
+ rtx div_equal, mod_equal, equal;
+ rtx_insn *insn;
div_equal = gen_rtx_UDIV (SImode, operands[1], operands[2]);
mod_equal = gen_rtx_UMOD (SImode, operands[1], operands[2]);
(clobber (match_dup 3))]
"!TARGET_ZARCH && !TARGET_CPU_ZARCH"
{
- rtx insn, udiv_equal, umod_equal, equal;
+ rtx udiv_equal, umod_equal, equal;
+ rtx_insn *insn;
udiv_equal = gen_rtx_UDIV (SImode, operands[1], operands[2]);
umod_equal = gen_rtx_UMOD (SImode, operands[1], operands[2]);
(clobber (match_dup 3))]
"!TARGET_ZARCH && !TARGET_CPU_ZARCH"
{
- rtx insn, udiv_equal, umod_equal, equal;
+ rtx udiv_equal, umod_equal, equal;
+ rtx_insn *insn;
udiv_equal = gen_rtx_UDIV (SImode, operands[1], operands[2]);
umod_equal = gen_rtx_UMOD (SImode, operands[1], operands[2]);
(clz:DI (match_operand:DI 1 "register_operand" "d")))]
"TARGET_EXTIMM && TARGET_ZARCH"
{
- rtx insn, clz_equal;
+ rtx_insn *insn;
+ rtx clz_equal;
rtx wide_reg = gen_reg_rtx (TImode);
rtx msb = gen_rtx_CONST_INT (DImode, (unsigned HOST_WIDE_INT) 1 << 63);
(unsigned_float:DF (match_operand:SI 1 "register_operand" "r")))]
""
"{
- rtx value, insns;
+ rtx value;
rtx c0 = spu_const_from_ints (V16QImode, 0x02031011, 0x12138080,
0x06071415, 0x16178080);
rtx r0 = gen_reg_rtx (V16QImode);
emit_library_call_value (convert_optab_libfunc (ufloat_optab,
DFmode, SImode),
NULL_RTX, LCT_NORMAL, DFmode, 1, operands[1], SImode);
- insns = get_insns ();
+ rtx_insn *insns = get_insns ();
end_sequence ();
emit_libcall_block (insns, operands[0], value,
gen_rtx_UNSIGNED_FLOAT (DFmode, operands[1]));
emit_library_call_value (convert_optab_libfunc (ufloat_optab,
DFmode, DImode),
NULL_RTX, LCT_NORMAL, DFmode, 1, operands[1], DImode);
- insns = get_insns ();
+ rtx_insn *insns = get_insns ();
end_sequence ();
emit_libcall_block (insns, operands[0], value,
gen_rtx_UNSIGNED_FLOAT (DFmode, operands[1]));
case TLS_MODEL_GLOBAL_DYNAMIC:
case TLS_MODEL_LOCAL_DYNAMIC:
{
- rtx r0, temp, temp2, temp3, got, last;
+ rtx r0, temp, temp2, temp3, got;
ret = gen_reg_rtx (Pmode);
r0 = gen_rtx_REG (Pmode, 0);
emit_move_insn (temp3, r0);
+ rtx_insn *last;
if (TARGET_32BIT)
last = emit_insn (gen_tls_gd_add_32bit (ret, temp3, addr));
else
if (AUTO_INC_DEC)
{
- rtx move = emit_move_insn (reg, src);
+ rtx_insn *move = emit_move_insn (reg, src);
if (MEM_P (src))
{
rtx note = find_reg_note (insn, REG_INC, NULL_RTX);
projects / gcc.git / commitdiff