dev, arm: Fix incorrect GIC address range sizes
authorAndreas Sandberg <andreas.sandberg@arm.com>
Wed, 18 Jul 2018 15:53:18 +0000 (16:53 +0100)
committerAndreas Sandberg <andreas.sandberg@arm.com>
Tue, 21 Aug 2018 17:20:10 +0000 (17:20 +0000)
The GICv2 specifies that 8KiB of the memory map is allocated to the
CPU interface and 4KiB is allocated to the distributor. The current
distributor size is off by 1 and the CPU interface is completely off
by a lot.

Change-Id: I90a9f669a46a37d79c6cc542087cf91f2044f104
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Reviewed-by: Curtis Dunham <curtis.dunham@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11769

src/dev/arm/RealView.py
src/dev/arm/gic_pl390.hh

index 60b6780803c5cf4d53f0633b9c3717dfd39cf4d6..837f79849a728d6d8a8f3be20a1a3a10141a888b 100644 (file)
@@ -1052,7 +1052,7 @@ Memory map:
        0x2b000000-0x2b00ffff: HDLCD
 
        0x2c001000-0x2c001fff: GIC (distributor)
-       0x2c002000-0x2c0020ff: GIC (CPU interface)
+       0x2c002000-0x2c003fff: GIC (CPU interface)
        0x2c004000-0x2c005fff: vGIC (HV)
        0x2c006000-0x2c007fff: vGIC (VCPU)
        0x2c1c0000-0x2c1cffff: GICv2m MSI frame 0
index b4e880bf2eda3bbad3b82c5199fa0b523bdf898b..7fd4bcbdaeee2dd5aa5ff28643128d12c2efd5cf 100644 (file)
@@ -72,7 +72,7 @@ class Pl390 : public BaseGic, public BaseGicRegisters
         GICD_PIDR2         = 0xfe8, // distributor peripheral ID2
         GICD_PIDR3         = 0xfec, // distributor peripheral ID3
 
-        DIST_SIZE          = 0xfff
+        DIST_SIZE          = 0x1000,
     };
 
     /**
@@ -111,7 +111,7 @@ class Pl390 : public BaseGic, public BaseGicRegisters
         GICC_APR3  = 0xdc, // active priority register 3
         GICC_IIDR  = 0xfc, // cpu interface id register
 
-        CPU_SIZE   = 0xff
+        CPU_SIZE   = 0x2000,
     };
 
     static const int SGI_MAX = 16;  // Number of Software Gen Interrupts