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don't generate trace data unless tracing is on
author
Ali Saidi
<saidi@eecs.umich.edu>
Fri, 1 Jun 2007 17:44:24 +0000
(13:44 -0400)
committer
Ali Saidi
<saidi@eecs.umich.edu>
Fri, 1 Jun 2007 17:44:24 +0000
(13:44 -0400)
--HG--
extra : convert_revision :
3953ace8d481d758d6e0d89183c0a7e7bebcf681
src/cpu/o3/fetch_impl.hh
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diff --git
a/src/cpu/o3/fetch_impl.hh
b/src/cpu/o3/fetch_impl.hh
index e16f975587839b59fce458e215f93336bb83fdc0..895b4a46cc611d3eff31382dfaa102173ae1586c 100644
(file)
--- a/
src/cpu/o3/fetch_impl.hh
+++ b/
src/cpu/o3/fetch_impl.hh
@@
-1151,10
+1151,14
@@
DefaultFetch<Impl>::fetch(bool &status_change)
DPRINTF(Fetch, "[tid:%i]: Instruction is: %s\n",
tid, instruction->staticInst->disassemble(fetch_PC));
+#if TRACING_ON
instruction->traceData =
Trace::getInstRecord(curTick, cpu->tcBase(tid),
instruction->staticInst,
instruction->readPC());
+#elif
+ instruction->traceData = NULL;
+#endif
///FIXME This needs to be more robust in dealing with delay slots
#if !ISA_HAS_DELAY_SLOT