* SOFTWARE.
*/
+/* #define NV50PC_DEBUG */
+
#include "nv50_pc.h"
#include "nv50_program.h"
uint32_t *code = pc->emit;
int n;
- debug_printf("emitting program: size = %u\n", pc->bin_size);
+ NV50_DBGMSG("emitting program: size = %u\n", pc->bin_size);
for (n = 0; n < pc->num_blocks; ++n) {
struct nv_instruction *i;
pc->emit = code;
code[pc->bin_size / 4 - 1] |= 1;
+#ifdef NV50PC_DEBUG
nvcg_show_bincode(pc);
+#endif
return 0;
}
ret = nv50_tgsi_to_nc(pc, ti);
if (ret)
goto out;
+#ifdef NV50PC_DEBUG
nv_print_program(pc->root);
+#endif
/* optimization */
ret = nv_pc_exec_pass0(pc);
ti->p->fixups = pc->fixups;
ti->p->num_fixups = pc->num_fixups;
- debug_printf("SHADER TRANSLATION - %s\n", ret ? "failure" : "success");
+ NV50_DBGMSG("SHADER TRANSLATION - %s\n", ret ? "failure" : "success");
out:
nv_pc_free_refs(pc);
if (nvi == b->phi) {
if (nvi->opcode != NV_OP_PHI)
- debug_printf("NOTE: b->phi points to non-PHI instruction\n");
+ NV50_DBGMSG("NOTE: b->phi points to non-PHI instruction\n");
assert(!nvi->prev);
if (!nvi->next || nvi->next->opcode != NV_OP_PHI)
#ifndef __NV50_COMPILER_H__
#define __NV50_COMPILER_H__
+#ifdef NV50PC_DEBUG
+# define NV50_DBGMSG(args...) debug_printf(args)
+#else
+# define NV50_DBGMSG(args...)
+#endif
+
#include "pipe/p_defines.h"
#include "util/u_inlines.h"
#include "util/u_memory.h"
struct nv_reg *reg = &value->join->reg;
if (reg->id < 0) {
- debug_printf("WARNING: unused dst, hope we can bucket it !\n");
- pc->emit[0] |= 127 << 2;
+ pc->emit[0] |= (127 << 2) | 1; /* set 'long'-bit to catch bugs */
pc->emit[1] |= 0x8;
return;
}
pc->emit[1] |= 0x8;
else
if (reg->file == NV_FILE_ADDR)
- assert(0);
+ assert(0);
pc->emit[0] |= reg->id << 2;
}
pc->emit[0] = 0x90000000;
- assert(SREG(src0)->type == NV_TYPE_F32);
- assert(SREG(src0)->file == NV_FILE_GPR);
+ assert(STYPE(i, 0) == NV_TYPE_F32);
+ assert(SFILE(i, 0) == NV_FILE_GPR);
if (!i->is_long) {
emit_form_MUL(pc, i);
void
nv50_emit_instruction(struct nv_pc *pc, struct nv_instruction *i)
{
- // nv_print_instruction(i);
+ /* nv_print_instruction(i); */
switch (i->opcode) {
case NV_OP_MOV:
* SOFTWARE.
*/
+/* #define NV50PC_DEBUG */
+
#include "nv50_pc.h"
#define DESCEND_ARBITRARY(j, f) \
return FALSE;
if (nvi->src[0]->value->join->reg.id < 0) {
- debug_printf("nvi_isnop: orphaned value detected\n");
+ NV50_DBGMSG("nvi_isnop: orphaned value detected\n");
return TRUE;
}
nv50_inst_min_size(nvi->next) == 4 &&
inst_commutation_legal(nvi, nvi->next)) {
++n32;
- debug_printf("permuting: ");
- nv_print_instruction(nvi);
- nv_print_instruction(nvi->next);
nv_nvi_permute(nvi, nvi->next);
next = nvi;
} else {
}
if (!b->entry) {
- debug_printf("block %p is now empty\n", b);
+ NV50_DBGMSG("block %p is now empty\n", b);
} else
if (!b->exit->is_long) {
assert(n32);
pc->pass_seq++;
nv_pass_flatten(&pass, pc->root);
- debug_printf("preparing %u blocks for emission\n", pc->num_blocks);
+ NV50_DBGMSG("preparing %u blocks for emission\n", pc->num_blocks);
pc->bb_list = CALLOC(pc->num_blocks, sizeof(struct nv_basic_block *));
pc->num_blocks = 0;
return 0;
}
-/*
-set $r2 g f32 $r2 $r3
-cvt abs rn f32 $r2 s32 $r2
-cvt f32 $c0 # f32 $r2
-e $c0 bra 0x80
-*/
-#if 0
-static int
-nv_pass_lower_cond(struct nv_pass *ctx, struct nv_basic_block *b)
-{
- /* XXX: easier in IR builder for now */
- return 0;
-}
-#endif
-
/* TODO: redundant store elimination */
struct load_record {
if (bb_is_if_else_endif(b)) {
- debug_printf("pass_flatten: IF/ELSE/ENDIF construct at BB:%i\n", b->id);
+ NV50_DBGMSG("pass_flatten: IF/ELSE/ENDIF construct at BB:%i\n", b->id);
for (n0 = 0, nvi = b->out[0]->entry; nvi; nvi = nvi->next, ++n0)
if (!nv50_nvi_can_predicate(nvi))
for (n1 = 0, nvi = b->out[1]->entry; nvi; nvi = nvi->next, ++n1)
if (!nv50_nvi_can_predicate(nvi))
break;
+#ifdef NV50_PC_DEBUG
if (nvi) {
debug_printf("cannot predicate: "); nv_print_instruction(nvi);
}
} else {
debug_printf("cannot predicate: "); nv_print_instruction(nvi);
+#endif
}
if (!nvi && n0 < 12 && n1 < 12) { /* 12 as arbitrary limit */
* SOFTWARE.
*/
+/* #define NV50PC_DEBUG */
+
#include "nv50_context.h"
#include "nv50_pc.h"
if (bgn < b->entry->serial || bgn > b->exit->serial)
bgn = b->entry->serial;
- if (bgn > end) {
- debug_printf("Aieee! BLOCK [%i, %i], RANGE [%i, %i)\n",
- b->entry->serial, b->exit->serial, bgn, end);
- }
assert(bgn <= end);
- if (bgn < val->insn->serial)
- debug_printf("WARNING: leaking value %i ?\n", val->n);
-
add_range_ex(val, bgn, end, NULL);
}
struct nv_instruction *i;
int j, n, ret = 0;
- debug_printf("pass_build_live_sets BB:%i\n", b->id);
-
- if (b->pass_seq >= ctx->pc->pass_seq) {
- debug_printf("already visited\n");
+ if (b->pass_seq >= ctx->pc->pass_seq)
return 0;
- }
b->pass_seq = ctx->pc->pass_seq;
/* slight hack for undecidedness: set phi = entry if it's undefined */
break;
assert(i->src[j]->value->insn);
- if (nvbb_reachable_by(b, i->src[j]->value->insn->bb, b->out[n])) {
+ if (nvbb_reachable_by(b, i->src[j]->value->insn->bb, b->out[n]))
live_set_add(b, i->src[j]->value);
- debug_printf("BB:%i liveset + %i\n", b->id, i->src[j]->value->n);
- } else {
+ else
live_set_rem(b, i->src[j]->value);
- debug_printf("BB:%i liveset - %i\n", b->id, i->src[j]->value->n);
- }
}
}
}
}
}
-/* NOTE: the live intervals of phi functions start the the first non-phi instruction */
+/* NOTE: the live intervals of phi functions start at the first non-phi insn. */
static int
pass_build_intervals(struct nv_pc_pass *ctx, struct nv_basic_block *b)
{
int j, s;
const int n = (ctx->pc->num_values + 31) / 32;
- debug_printf("building intervals for BB %i\n", b->id);
-
/* verify that first block does not have live-in values */
if (b->num_in == 0)
for (j = 0; j < n; ++j)
add_range(&ctx->pc->values[j], b, b->exit->serial + 1);
}
}
- debug_printf("%s: looping through instructions now\n", __func__);
i_stop = b->entry ? b->entry->prev : NULL;
{
struct nv_value *elem = list->prev;
- // debug_printf("inserting value %i\n", nval->n);
-
for (elem = list->prev;
elem != list && elem->livei->bgn > nval->livei->bgn;
elem = elem->prev);
foreach_s(cur, tmp[0], &unhandled) {
remove_from_list(cur);
- /* debug_printf("handling value %i\n", cur->n); */
-
foreach_s(val, tmp[1], &active) {
if (livei_end(val) <= cur->livei->bgn) {
reg_release(&free, val);
struct nv_pc_pass *ctx;
int i, ret;
- debug_printf("REGISTER ALLOCATION - entering\n");
+ NV50_DBGMSG("REGISTER ALLOCATION - entering\n");
ctx = CALLOC_STRUCT(nv_pc_pass);
if (!ctx)
return -1;
ctx->pc = pc;
- nv_print_program(ctx->pc->root);
-
ctx->insns = CALLOC(NV_PC_MAX_INSTRUCTIONS, sizeof(struct nv_instruction *));
pc->pass_seq++;
ret = pass_generate_phi_movs(ctx, pc->root);
assert(!ret);
- nv_print_program(ctx->pc->root);
-
for (i = 0; i < pc->loop_nesting_bound; ++i) {
pc->pass_seq++;
ret = pass_build_live_sets(ctx, pc->root);
for (i = 0; i < pc->num_values; ++i)
livei_release(&pc->values[i]);
- debug_printf("REGISTER ALLOCATION - leaving\n");
- nv_print_program(ctx->pc->root);
+ NV50_DBGMSG("REGISTER ALLOCATION - leaving\n");
out:
FREE(ctx);
* SOFTWARE.
*/
+/* #define NV50_PROGRAM_DEBUG */
+
#include "nv50_program.h"
#include "nv50_pc.h"
#include "nv50_context.h"
int c;
unsigned n = ++ti->immd32_nr;
- tgsi_dump_immediate(imm);
-
if (n == (1 << (ffs(n) - 1)))
ti->immd32 = REALLOC(ti->immd32, (n / 2) * 16, (n * 2) * 16);
sn = decl->Semantic.Name;
si = decl->Semantic.Index;
}
- tgsi_dump_declaration(decl);
switch (decl->Declaration.File) {
case TGSI_FILE_INPUT:
tgsi_scan_shader(p->pipe.tokens, &ti->scan);
+#ifdef NV50_PROGRAM_DEBUG
+ tgsi_dump(p->pipe.tokens, 0);
+#endif
+
tgsi_parse_init(&parse, p->pipe.tokens);
while (!tgsi_parse_end_of_tokens(&parse)) {
tgsi_parse_token(&parse);
* SOFTWARE.
*/
+/* #define NV50_TGSI2NC_DEBUG */
+
/* XXX: need to clean this up so we get the typecasting right more naturally */
#include <unistd.h>
abort();
break;
}
- if (!res) {
- debug_printf("WARNING: undefined source value in TGSI instruction\n");
- return bld_load_imm_u32(bld, 0);
- }
+ if (!res)
+ return bld_undef(bld, NV_FILE_GPR);
switch (tgsi_util_get_full_src_register_sign_mode(src, chan)) {
case TGSI_UTIL_SIGN_KEEP:
int c;
uint opcode = translate_opcode(insn->Instruction.Opcode);
- tgsi_dump_instruction(insn, 1);
+#ifdef NV50_TGSI2NC_DEBUG
+ debug_printf("bld_instruction:"); tgsi_dump_instruction(insn, 1);
+#endif
switch (insn->Instruction.Opcode) {
case TGSI_OPCODE_ADD:
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