* gdbarch.sh (register_name): Add gdbarch parameter.
* gdbarch.{c,h}: Regenerate.
* target-descriptions.c (tdesc_register_name): Add gdbarch parameter.
(tdesc_register_name): Replace current_gdbarch by gdbarch.
* target-descriptions.h (tdesc_register_name): Add gdbarch parameter.
* xstormy16-tdep.c (xstormy16_register_name): Add gdbarch parameter.
* vax-tdep.c (vax_register_name): Add gdbarch parameter.
* spu-tdep.c (spu_register_name): Add gdbarch parameter.
* s390-tdep.c (s390_register_name): Add gdbarch parameter.
* mt-tdep.c (mt_register_name): Add gdbarch parameter.
(mt_registers_info): Replace current_gdbarch by gdbarch.
(mt_register_reggroup_p): Add gdbarch to mt_register_name call.
* mips-tdep.c (mips_register_name): Add gdbarch parameter. Replace
current_gdbarch by gdbarch.
(mips_register_name): Add gdbarch to tdesc_register_name call.
* mep-tdep.c (mep_register_name): Add gdbarch parameter. Replace
current_gdbarch by gdbarch.
(mep_register_reggroup_p): Add gdbarch to mep_register_name call.
* m32c-tdep.c (m32c_register_name): Add gdbarch parameter. Replace
current_gdbarch by gdbarch.
* m88k-tdep.c (m88k_register_name): Add gdbarch parameter.
* m68k-tdep.c (m68k_register_name): Add gdbarch parameter.
* m32r-tdep.c (m32r_register_name): Add gdbarch parameter.
(m32r_frame_unwind_cache): Use get_frame_arch to get at the current
architecture by frame_info.
* iq2000-tdep.c (iq2000_register_name): Add gdbarch parameter.
* ia64-tdep.c (ia64_register_name): Add gdbarch parameter.
* hppa-tdep.c (hppa32_register_name, hppa64_register_name): Add gdbarch
parameter.
* h8300-tdep.c (h8300_register_name, h8300s_register_name)
(h8300sx_register_name): Add gdbarch parameter.
* cris-tdep.c (cris_register_name, crisv32_register_name): Add
gdbarch parameter. Replace current_gdbarch by gdbarch.
(cris_gdbarch_init): Replace current_gdbarch by gdbarch (comment).
* avr-tdep.c (avr_register_name): Add gdbarch parameter.
* arm-tdep.c (arm_register_name): Add gdbarch paramete
* amd64-tdep.c (amd64_register_name): Add gdbarch parameter. Update
caller.
* amd64-tdep.h (amd64_register_name): Add gdbarch parameter.
* amd64-linux-tdep.c (amd64_linux_register_name): Add gdbarch parameter.
* alpha-tdep.c (alpha_register_name): Add gdbarch parameter.
(alpha_cannot_fetch_register, alpha_cannot_store_register): Update call
of alpha_register_name.
* frv-tdep.c (frv_register_name): Add gdbarch parameter.
* i386-tdep.c (i386_register_name): Add gdbarch parameter. Replace
current_gdbarch by gdbarch.
(i386_register_type): Replace ?current_gdbarch by gdbarch.
* i386-tdep.h (i386_register_name): Add gdbarch parameter.
* i386-linux-tdep.c (i386_linux_register_name): Add gdbarch parameter.
* m68hc11-tdep.c (m68hc11_register_name): Add gdbarch parameter.
(m68hc11_register_reggroup_p): Add gdbarch to call of
m68hc11_register_name.
* mn10300-tdep.c (mn10300_generic_register_name, am33_register_name)
(am33_2_register_name): Add gdbarch parameter.
(mn10300_frame_unwind_cache): Use get_frame_arch to get at the current
architecture by frame_info.
(mn10300_dump_tdep): Replace current_gdbarch by gdbarch.
* rs6000-tdep.c (rs6000_register_name): Add gdbarch parameter. Replace
current_gdbarch by gdbarch.
* score-tdep.c (score_register_name): Add gdbarch parameter.
(score_return_value, score_push_dummy_call): Replace current_gdbarch
by gdbarch.
* sh64-tdep.c (sh64_register_name): Add gdbarch parameter.
(sh64_compact_reg_base_num, sh64_register_convert_to_virtual)
(sh64_register_convert_to_raw, sh64_fv_reg_base_num)
(sh64_dr_reg_base_num, sh64_fpp_reg_base_num): Add gdbarch parameter
and update caller. Replace current_gdbarch by gdbarch.
(sh64_extract_return_value, sh64_store_return_value): Use
get_regcache_arch to get at the current architecture by regcache.
* sh-tdep.c (sh_sh_register_name, sh_sh3_register_name)
(sh_sh3e_register_name, sh_sh2e_register_name, sh_sh2a_register_name)
(sh_sh2a_nofpu_register_name, sh_sh_dsp_register_name)
(sh_sh3_dsp_register_name, sh_sh4_register_name)
(sh_sh4_nofpu_register_name, sh_sh4al_dsp_register_name): Add gdbarch
parameter.
(fv_reg_base_num, dr_reg_base_num, sh_justify_value_in_reg)
(sh_next_flt_argreg): Add gdbarch parameter and update caller. Replace
current_gdbarch by gdbarch.
(sh_extract_return_value_fpu, sh_store_return_value_fpu): Use
get_regcache_arch to get at the current architecture by regcache.
* sparc-tdep.c (sparc32_register_name): Add gdbarch parameter.
* sparc64-tdep.c (sparc64_register_name): Add gdbarch parameter.
* v850-tdep.c (v850_register_name, v850e_register_name): Add gdbarch
parameter.
(v850_unwind_sp, v850_unwind_pc): Replace current_gdbarch by gdbarch.
* xtensa-tdep.c (xtensa_register_name): Add gdbarch parameter. Replace
current_gdbarch by gdbarch.
(xtensa_pseudo_register_read, xtensa_pseudo_register_write)
(xtensa_frame_prev_register): Add gdbarch parameter to
xtensa_register_name call.
+2007-11-02 Markus Deuling <deuling@de.ibm.com>
+
+ * gdbarch.sh (register_name): Add gdbarch parameter.
+ * gdbarch.{c,h}: Regenerate.
+
+ * target-descriptions.c (tdesc_register_name): Add gdbarch parameter.
+ (tdesc_register_name): Replace current_gdbarch by gdbarch.
+ * target-descriptions.h (tdesc_register_name): Add gdbarch parameter.
+
+ * xstormy16-tdep.c (xstormy16_register_name): Add gdbarch parameter.
+ * vax-tdep.c (vax_register_name): Add gdbarch parameter.
+ * spu-tdep.c (spu_register_name): Add gdbarch parameter.
+ * s390-tdep.c (s390_register_name): Add gdbarch parameter.
+ * mt-tdep.c (mt_register_name): Add gdbarch parameter.
+ (mt_registers_info): Replace current_gdbarch by gdbarch.
+ (mt_register_reggroup_p): Add gdbarch to mt_register_name call.
+ * mips-tdep.c (mips_register_name): Add gdbarch parameter. Replace
+ current_gdbarch by gdbarch.
+ (mips_register_name): Add gdbarch to tdesc_register_name call.
+ * mep-tdep.c (mep_register_name): Add gdbarch parameter. Replace
+ current_gdbarch by gdbarch.
+ (mep_register_reggroup_p): Add gdbarch to mep_register_name call.
+ * m32c-tdep.c (m32c_register_name): Add gdbarch parameter. Replace
+ current_gdbarch by gdbarch.
+ * m88k-tdep.c (m88k_register_name): Add gdbarch parameter.
+ * m68k-tdep.c (m68k_register_name): Add gdbarch parameter.
+ * m32r-tdep.c (m32r_register_name): Add gdbarch parameter.
+ (m32r_frame_unwind_cache): Use get_frame_arch to get at the current
+ architecture by frame_info.
+ * iq2000-tdep.c (iq2000_register_name): Add gdbarch parameter.
+ * ia64-tdep.c (ia64_register_name): Add gdbarch parameter.
+ * hppa-tdep.c (hppa32_register_name, hppa64_register_name): Add gdbarch
+ parameter.
+ * h8300-tdep.c (h8300_register_name, h8300s_register_name)
+ (h8300sx_register_name): Add gdbarch parameter.
+ * cris-tdep.c (cris_register_name, crisv32_register_name): Add
+ gdbarch parameter. Replace current_gdbarch by gdbarch.
+ (cris_gdbarch_init): Replace current_gdbarch by gdbarch (comment).
+ * avr-tdep.c (avr_register_name): Add gdbarch parameter.
+ * arm-tdep.c (arm_register_name): Add gdbarch paramete
+ * amd64-tdep.c (amd64_register_name): Add gdbarch parameter. Update
+ caller.
+ * amd64-tdep.h (amd64_register_name): Add gdbarch parameter.
+ * amd64-linux-tdep.c (amd64_linux_register_name): Add gdbarch parameter.
+ * alpha-tdep.c (alpha_register_name): Add gdbarch parameter.
+ (alpha_cannot_fetch_register, alpha_cannot_store_register): Update call
+ of alpha_register_name.
+ * frv-tdep.c (frv_register_name): Add gdbarch parameter.
+ * i386-tdep.c (i386_register_name): Add gdbarch parameter. Replace
+ current_gdbarch by gdbarch.
+ (i386_register_type): Replace ?current_gdbarch by gdbarch.
+ * i386-tdep.h (i386_register_name): Add gdbarch parameter.
+ * i386-linux-tdep.c (i386_linux_register_name): Add gdbarch parameter.
+
+ * m68hc11-tdep.c (m68hc11_register_name): Add gdbarch parameter.
+ (m68hc11_register_reggroup_p): Add gdbarch to call of
+ m68hc11_register_name.
+ * mn10300-tdep.c (mn10300_generic_register_name, am33_register_name)
+ (am33_2_register_name): Add gdbarch parameter.
+ (mn10300_frame_unwind_cache): Use get_frame_arch to get at the current
+ architecture by frame_info.
+ (mn10300_dump_tdep): Replace current_gdbarch by gdbarch.
+ * rs6000-tdep.c (rs6000_register_name): Add gdbarch parameter. Replace
+ current_gdbarch by gdbarch.
+ * score-tdep.c (score_register_name): Add gdbarch parameter.
+ (score_return_value, score_push_dummy_call): Replace current_gdbarch
+ by gdbarch.
+ * sh64-tdep.c (sh64_register_name): Add gdbarch parameter.
+ (sh64_compact_reg_base_num, sh64_register_convert_to_virtual)
+ (sh64_register_convert_to_raw, sh64_fv_reg_base_num)
+ (sh64_dr_reg_base_num, sh64_fpp_reg_base_num): Add gdbarch parameter
+ and update caller. Replace current_gdbarch by gdbarch.
+ (sh64_extract_return_value, sh64_store_return_value): Use
+ get_regcache_arch to get at the current architecture by regcache.
+ * sh-tdep.c (sh_sh_register_name, sh_sh3_register_name)
+ (sh_sh3e_register_name, sh_sh2e_register_name, sh_sh2a_register_name)
+ (sh_sh2a_nofpu_register_name, sh_sh_dsp_register_name)
+ (sh_sh3_dsp_register_name, sh_sh4_register_name)
+ (sh_sh4_nofpu_register_name, sh_sh4al_dsp_register_name): Add gdbarch
+ parameter.
+ (fv_reg_base_num, dr_reg_base_num, sh_justify_value_in_reg)
+ (sh_next_flt_argreg): Add gdbarch parameter and update caller. Replace
+ current_gdbarch by gdbarch.
+ (sh_extract_return_value_fpu, sh_store_return_value_fpu): Use
+ get_regcache_arch to get at the current architecture by regcache.
+ * sparc-tdep.c (sparc32_register_name): Add gdbarch parameter.
+ * sparc64-tdep.c (sparc64_register_name): Add gdbarch parameter.
+ * v850-tdep.c (v850_register_name, v850e_register_name): Add gdbarch
+ parameter.
+ (v850_unwind_sp, v850_unwind_pc): Replace current_gdbarch by gdbarch.
+ * xtensa-tdep.c (xtensa_register_name): Add gdbarch parameter. Replace
+ current_gdbarch by gdbarch.
+ (xtensa_pseudo_register_read, xtensa_pseudo_register_write)
+ (xtensa_frame_prev_register): Add gdbarch parameter to
+ xtensa_register_name call.
+
2007-10-31 Ulrich Weigand <uweigand@de.ibm.com>
* ppc-linux-tdep.c (ppc_linux_skip_trampoline_code): Fall back to
compatibility with existing remote alpha targets. */
static const char *
-alpha_register_name (int regno)
+alpha_register_name (struct gdbarch *gdbarch, int regno)
{
static const char * const register_names[] =
{
alpha_cannot_fetch_register (int regno)
{
return (regno == ALPHA_ZERO_REGNUM
- || strlen (alpha_register_name (regno)) == 0);
+ || strlen (alpha_register_name (current_gdbarch, regno)) == 0);
}
static int
alpha_cannot_store_register (int regno)
{
return (regno == ALPHA_ZERO_REGNUM
- || strlen (alpha_register_name (regno)) == 0);
+ || strlen (alpha_register_name (current_gdbarch, regno)) == 0);
}
static struct type *
/* Replacement register functions which know about %orig_rax. */
static const char *
-amd64_linux_register_name (int reg)
+amd64_linux_register_name (struct gdbarch *gdbarch, int reg)
{
if (reg == AMD64_LINUX_ORIG_RAX_REGNUM)
return "orig_rax";
- return amd64_register_name (reg);
+ return amd64_register_name (gdbarch, reg);
}
static struct type *
/* Return the name of register REGNUM. */
const char *
-amd64_register_name (int regnum)
+amd64_register_name (struct gdbarch *gdbarch, int regnum)
{
if (regnum >= 0 && regnum < AMD64_NUM_REGS)
return amd64_register_names[regnum];
/* Functions from amd64-tdep.c which may be needed on architectures
with extra registers. */
-extern const char *amd64_register_name (int regnum);
+extern const char *amd64_register_name (struct gdbarch *gdbarch, int regnum);
extern struct type *amd64_register_type (struct gdbarch *gdbarch, int regnum);
/* Fill register REGNUM in REGCACHE with the appropriate
\f
/* Return the ARM register name corresponding to register I. */
static const char *
-arm_register_name (int i)
+arm_register_name (struct gdbarch *gdbarch, int i)
{
if (i >= ARRAY_SIZE (arm_register_names))
/* These registers are only supported on targets which supply
/* Lookup the name of a register given it's number. */
static const char *
-avr_register_name (int regnum)
+avr_register_name (struct gdbarch *gdbarch, int regnum)
{
static char *register_names[] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
}
static const char *
-cris_register_name (int regno)
+cris_register_name (struct gdbarch *gdbarch, int regno)
{
static char *cris_genreg_names[] =
{ "r0", "r1", "r2", "r3", \
/* General register. */
return cris_genreg_names[regno];
}
- else if (regno >= NUM_GENREGS && regno < gdbarch_num_regs (current_gdbarch))
+ else if (regno >= NUM_GENREGS && regno < gdbarch_num_regs (gdbarch))
{
return cris_special_register_name (regno);
}
}
static const char *
-crisv32_register_name (int regno)
+crisv32_register_name (struct gdbarch *gdbarch, int regno)
{
static char *crisv32_genreg_names[] =
{ "r0", "r1", "r2", "r3", \
{
return cris_special_register_name (regno);
}
- else if (regno == gdbarch_pc_regnum (current_gdbarch))
+ else if (regno == gdbarch_pc_regnum (gdbarch))
{
return "pc";
}
/* The total amount of space needed to store (in an array called registers)
GDB's copy of the machine's register state. Note: We can not use
- cris_register_size at this point, since it relies on current_gdbarch
+ cris_register_size at this point, since it relies on gdbarch
being set. */
switch (tdep->cris_version)
{
}
static const char *
-frv_register_name (int reg)
+frv_register_name (struct gdbarch *gdbarch, int reg)
{
if (reg < 0)
return "?toosmall?";
/* Skip verify of dwarf_reg_to_regnum, invalid_p == 0 */
/* Skip verify of sdb_reg_to_regnum, invalid_p == 0 */
/* Skip verify of dwarf2_reg_to_regnum, invalid_p == 0 */
+ if (current_gdbarch->register_name == 0)
+ fprintf_unfiltered (log, "\n\tregister_name");
/* Skip verify of register_type, has predicate */
/* Skip verify of unwind_dummy_id, has predicate */
/* Skip verify of deprecated_fp_regnum, invalid_p == 0 */
gdb_assert (gdbarch->register_name != NULL);
if (gdbarch_debug >= 2)
fprintf_unfiltered (gdb_stdlog, "gdbarch_register_name called\n");
- return gdbarch->register_name (regnr);
+ return gdbarch->register_name (gdbarch, regnr);
}
void
extern int gdbarch_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int dwarf2_regnr);
extern void set_gdbarch_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, gdbarch_dwarf2_reg_to_regnum_ftype *dwarf2_reg_to_regnum);
-typedef const char * (gdbarch_register_name_ftype) (int regnr);
+typedef const char * (gdbarch_register_name_ftype) (struct gdbarch *gdbarch, int regnr);
extern const char * gdbarch_register_name (struct gdbarch *gdbarch, int regnr);
extern void set_gdbarch_register_name (struct gdbarch *gdbarch, gdbarch_register_name_ftype *register_name);
# Convert from an sdb register number to an internal gdb register number.
f:int:sdb_reg_to_regnum:int sdb_regnr:sdb_regnr::no_op_reg_to_regnum::0
f:int:dwarf2_reg_to_regnum:int dwarf2_regnr:dwarf2_regnr::no_op_reg_to_regnum::0
-f:const char *:register_name:int regnr:regnr
+m:const char *:register_name:int regnr:regnr::0
# Return the type of a register specified by the architecture. Only
# the register cache should call this function directly; others should
static struct cmd_list_element *setmachinelist;
static const char *
-h8300_register_name (int regno)
+h8300_register_name (struct gdbarch *gdbarch, int regno)
{
/* The register names change depending on which h8300 processor
type is selected. */
}
static const char *
-h8300s_register_name (int regno)
+h8300s_register_name (struct gdbarch *gdbarch, int regno)
{
static char *register_names[] = {
"er0", "er1", "er2", "er3", "er4", "er5", "er6",
}
static const char *
-h8300sx_register_name (int regno)
+h8300sx_register_name (struct gdbarch *gdbarch, int regno)
{
static char *register_names[] = {
"er0", "er1", "er2", "er3", "er4", "er5", "er6",
/* Return the name of a register. */
static const char *
-hppa32_register_name (int i)
+hppa32_register_name (struct gdbarch *gdbarch, int i)
{
static char *names[] = {
"flags", "r1", "rp", "r3",
}
static const char *
-hppa64_register_name (int i)
+hppa64_register_name (struct gdbarch *gdbarch, int i)
{
static char *names[] = {
"flags", "r1", "rp", "r3",
/* Return the name of register REG. */
static const char *
-i386_linux_register_name (int reg)
+i386_linux_register_name (struct gdbarch *gdbarch, int reg)
{
/* Deal with the extra "orig_eax" pseudo register. */
if (reg == I386_LINUX_ORIG_EAX_REGNUM)
return "orig_eax";
- return i386_register_name (reg);
+ return i386_register_name (gdbarch, reg);
}
/* Return non-zero, when the register is in the corresponding register
/* Return the name of register REGNUM. */
const char *
-i386_register_name (int regnum)
+i386_register_name (struct gdbarch *gdbarch, int regnum)
{
- if (i386_mmx_regnum_p (current_gdbarch, regnum))
+ if (i386_mmx_regnum_p (gdbarch, regnum))
return i386_mmx_names[regnum - I387_MM0_REGNUM];
if (regnum >= 0 && regnum < i386_num_register_names)
return i386_sse_type (gdbarch);
#define I387_ST0_REGNUM I386_ST0_REGNUM
-#define I387_NUM_XMM_REGS (gdbarch_tdep (current_gdbarch)->num_xmm_regs)
+#define I387_NUM_XMM_REGS (gdbarch_tdep (gdbarch)->num_xmm_regs)
if (regnum == I387_MXCSR_REGNUM)
return i386_mxcsr_type;
extern CORE_ADDR i386_pe_skip_trampoline_code (CORE_ADDR pc, char *name);
/* Return the name of register REGNUM. */
-extern char const *i386_register_name (int regnum);
+extern char const *i386_register_name (struct gdbarch * gdbarch, int regnum);
/* Return non-zero if REGNUM is a member of the specified group. */
extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
}
static const char *
-ia64_register_name (int reg)
+ia64_register_name (struct gdbarch *gdbarch, int reg)
{
return ia64_register_names[reg];
}
Returns the name of the iq2000 register number N. */
static const char *
-iq2000_register_name (int regnum)
+iq2000_register_name (struct gdbarch *gdbarch, int regnum)
{
static const char * names[E_NUM_REGS] =
{
/* Register set. */
static const char *
-m32c_register_name (int num)
+m32c_register_name (struct gdbarch *gdbarch, int num)
{
- return gdbarch_tdep (current_gdbarch)->regs[num].name;
+ return gdbarch_tdep (gdbarch)->regs[num].name;
}
};
static const char *
-m32r_register_name (int reg_nr)
+m32r_register_name (struct gdbarch *gdbarch, int reg_nr)
{
if (reg_nr < 0)
return NULL;
/* Adjust all the saved registers so that they contain addresses and
not offsets. */
- for (i = 0; i < gdbarch_num_regs (current_gdbarch) - 1; i++)
+ for (i = 0; i < gdbarch_num_regs (get_frame_arch (next_frame)) - 1; i++)
if (trad_frame_addr_p (info->saved_regs, i))
info->saved_regs[i].addr = (info->prev_sp + info->saved_regs[i].addr);
}
static const char *
-m68hc11_register_name (int reg_nr)
+m68hc11_register_name (struct gdbarch *gdbarch, int reg_nr)
{
if (reg_nr == M68HC12_HARD_PC_REGNUM && USE_PAGE_REGISTER)
return "pc";
|| regnum == SOFT_TMP_REGNUM
|| regnum == SOFT_ZS_REGNUM
|| regnum == SOFT_XY_REGNUM)
- && m68hc11_register_name (regnum)));
+ && m68hc11_register_name (gdbarch, regnum)));
}
/* Group to identify gcc soft registers (d1..dN). */
if (group == m68hc11_soft_reggroup)
{
- return regnum >= SOFT_D1_REGNUM && m68hc11_register_name (regnum);
+ return regnum >= SOFT_D1_REGNUM
+ && m68hc11_register_name (gdbarch, regnum);
}
if (group == m68hc11_hard_reggroup)
Returns the name of the standard m68k register regnum. */
static const char *
-m68k_register_name (int regnum)
+m68k_register_name (struct gdbarch *gdbarch, int regnum)
{
if (regnum < 0 || regnum >= ARRAY_SIZE (m68k_register_names))
internal_error (__FILE__, __LINE__,
/* Return the name of register REGNUM. */
static const char *
-m88k_register_name (int regnum)
+m88k_register_name (struct gdbarch *gdbarch, int regnum)
{
static char *register_names[] =
{
static const char *
-mep_register_name (int regnr)
+mep_register_name (struct gdbarch *gdbarch, int regnr)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
/* General-purpose registers. */
static const char *gpr_names[] = {
{
/* Filter reserved or unused register numbers. */
{
- const char *name = mep_register_name (regnum);
+ const char *name = mep_register_name (gdbarch, regnum);
if (! name || name[0] == '\0')
return 0;
/* Return the name of the register corresponding to REGNO. */
static const char *
-mips_register_name (int regno)
+mips_register_name (struct gdbarch *gdbarch, int regno)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
/* GPR names for all ABIs other than n32/n64. */
static char *mips_gpr_names[] = {
"zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
"t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra"
};
- enum mips_abi abi = mips_abi (current_gdbarch);
+ enum mips_abi abi = mips_abi (gdbarch);
/* Map [gdbarch_num_regs .. 2*gdbarch_num_regs) onto the raw registers,
but then don't make the raw register names visible. */
- int rawnum = regno % gdbarch_num_regs (current_gdbarch);
- if (regno < gdbarch_num_regs (current_gdbarch))
+ int rawnum = regno % gdbarch_num_regs (gdbarch);
+ if (regno < gdbarch_num_regs (gdbarch))
return "";
/* The MIPS integer registers are always mapped from 0 to 31. The
else
return mips_gpr_names[rawnum];
}
- else if (tdesc_has_registers (gdbarch_target_desc (current_gdbarch)))
- return tdesc_register_name (rawnum);
- else if (32 <= rawnum && rawnum < gdbarch_num_regs (current_gdbarch))
+ else if (tdesc_has_registers (gdbarch_target_desc (gdbarch)))
+ return tdesc_register_name (gdbarch, rawnum);
+ else if (32 <= rawnum && rawnum < gdbarch_num_regs (gdbarch))
{
gdb_assert (rawnum - 32 < NUM_MIPS_PROCESSOR_REGS);
return tdep->mips_processor_reg_names[rawnum - 32];
}
static const char *
-mn10300_generic_register_name (int reg)
+mn10300_generic_register_name (struct gdbarch *gdbarch, int reg)
{
static char *regs[] =
{ "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
static const char *
-am33_register_name (int reg)
+am33_register_name (struct gdbarch *gdbarch, int reg)
{
static char *regs[] =
{ "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
}
static const char *
-am33_2_register_name (int reg)
+am33_2_register_name (struct gdbarch *gdbarch, int reg)
{
static char *regs[] =
{
return (*this_prologue_cache);
cache = trad_frame_cache_zalloc (next_frame);
- pc = gdbarch_unwind_pc (current_gdbarch, next_frame);
+ pc = gdbarch_unwind_pc (get_frame_arch (next_frame), next_frame);
mn10300_analyze_prologue (next_frame, (void **) &cache, pc);
if (find_pc_partial_function (pc, NULL, &start, &end))
trad_frame_set_id (cache,
/* Dump out the mn10300 specific architecture information. */
static void
-mn10300_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file)
+mn10300_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
fprintf_unfiltered (file, "mn10300_dump_tdep: am33_mode = %d\n",
tdep->am33_mode);
}
/* Return name of register number specified by REGNUM. */
static const char *
-mt_register_name (int regnum)
+mt_register_name (struct gdbarch *gdbarch, int regnum)
{
static const char *const register_names[] = {
/* CPU regs. */
if (group == all_reggroup)
return (regnum >= 0
&& regnum < MT_NUM_REGS + MT_NUM_PSEUDO_REGS
- && mt_register_name (regnum)[0] != '\0');
+ && mt_register_name (gdbarch, regnum)[0] != '\0');
if (group == general_reggroup)
return (regnum >= MT_R0_REGNUM && regnum <= MT_R15_REGNUM);
static void
mt_registers_info (struct gdbarch *gdbarch,
- struct ui_file *file,
- struct frame_info *frame, int regnum, int all)
+ struct ui_file *file,
+ struct frame_info *frame, int regnum, int all)
{
if (regnum == -1)
{
frame_register_read (frame, regnum, buff);
fputs_filtered (gdbarch_register_name
- (current_gdbarch, regnum), file);
+ (gdbarch, regnum), file);
print_spaces_filtered (15 - strlen (gdbarch_register_name
- (current_gdbarch, regnum)),
+ (gdbarch, regnum)),
file);
fputs_filtered ("0x", file);
frame_register_read (frame, MT_COPRO_REGNUM, buf);
/* And print. */
regnum = MT_COPRO_PSEUDOREG_REGNUM;
- fputs_filtered (gdbarch_register_name (current_gdbarch, regnum),
+ fputs_filtered (gdbarch_register_name (gdbarch, regnum),
file);
print_spaces_filtered (15 - strlen (gdbarch_register_name
- (current_gdbarch, regnum)),
+ (gdbarch, regnum)),
file);
val_print (register_type (gdbarch, regnum), buf,
0, 0, file, 0, 1, 0, Val_no_prettyprint);
/* And print. */
regnum = MT_MAC_PSEUDOREG_REGNUM;
- fputs_filtered (gdbarch_register_name (current_gdbarch, regnum),
+ fputs_filtered (gdbarch_register_name (gdbarch, regnum),
file);
print_spaces_filtered (15 - strlen (gdbarch_register_name
- (current_gdbarch, regnum)),
+ (gdbarch, regnum)),
file);
fputs_filtered ("0x", file);
print_longest (file, 'x', 0, newmac);
is an anonymous register. */
static const char *
-rs6000_register_name (int regno)
+rs6000_register_name (struct gdbarch *gdbarch, int regno)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
/* The upper half "registers" have names in the XML description,
but we present only the low GPRs and the full 64-bit registers
return spe_regnames[regno - tdep->ppc_ev0_regnum];
}
- return tdesc_register_name (regno);
+ return tdesc_register_name (gdbarch, regno);
}
/* Return the GDB type object for the "standard" data type of data in
/* Return the name of register REGNUM. */
static const char *
-s390_register_name (int regnum)
+s390_register_name (struct gdbarch *gdbarch, int regnum)
{
static const char *register_names[S390_NUM_TOTAL_REGS] =
{
}
static const char *
-score_register_name (int regnum)
+score_register_name (struct gdbarch *gdbarch, int regnum)
{
const char *score_register_names[] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
if (offset + xfer > TYPE_LENGTH (type))
xfer = TYPE_LENGTH (type) - offset;
score_xfer_register (regcache, regnum, xfer,
- gdbarch_byte_order (current_gdbarch),
+ gdbarch_byte_order (gdbarch),
readbuf, writebuf, offset);
}
return RETURN_VALUE_REGISTER_CONVENTION;
Where X is a hole. */
- if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
&& (typecode == TYPE_CODE_STRUCT
|| typecode == TYPE_CODE_UNION)
&& argreg > SCORE_LAST_ARG_REGNUM
/* The last part of a arg should shift left when
gdbarch_byte_order is BFD_ENDIAN_BIG. */
- if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
&& arg_last_part_p == 1
&& (typecode == TYPE_CODE_STRUCT
|| typecode == TYPE_CODE_UNION))
};
static const char *
-sh_sh_register_name (int reg_nr)
+sh_sh_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
}
static const char *
-sh_sh3_register_name (int reg_nr)
+sh_sh3_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
}
static const char *
-sh_sh3e_register_name (int reg_nr)
+sh_sh3e_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
}
static const char *
-sh_sh2e_register_name (int reg_nr)
+sh_sh2e_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
}
static const char *
-sh_sh2a_register_name (int reg_nr)
+sh_sh2a_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] = {
/* general registers 0-15 */
}
static const char *
-sh_sh2a_nofpu_register_name (int reg_nr)
+sh_sh2a_nofpu_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] = {
/* general registers 0-15 */
}
static const char *
-sh_sh_dsp_register_name (int reg_nr)
+sh_sh_dsp_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
}
static const char *
-sh_sh3_dsp_register_name (int reg_nr)
+sh_sh3_dsp_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
}
static const char *
-sh_sh4_register_name (int reg_nr)
+sh_sh4_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] = {
/* general registers 0-15 */
}
static const char *
-sh_sh4_nofpu_register_name (int reg_nr)
+sh_sh4_nofpu_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] = {
/* general registers 0-15 */
}
static const char *
-sh_sh4al_dsp_register_name (int reg_nr)
+sh_sh4al_dsp_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
/* Helper function to justify value in register according to endianess. */
static char *
-sh_justify_value_in_reg (struct value *val, int len)
+sh_justify_value_in_reg (struct gdbarch *gdbarch, struct value *val, int len)
{
static char valbuf[4];
if (len < 4)
{
/* value gets right-justified in the register or stack word */
- if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
memcpy (valbuf + (4 - len), (char *) value_contents (val), len);
else
memcpy (valbuf, (char *) value_contents (val), len);
29) the parity of the register number is preserved, which is important
for the double register passing test (see the "argreg & 1" test below). */
static int
-sh_next_flt_argreg (int len)
+sh_next_flt_argreg (struct gdbarch *gdbarch, int len)
{
int argreg;
/* Also mark the next register as used. */
flt_argreg_array[argreg + 1] = 1;
}
- else if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
+ else if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
{
/* In little endian, gcc passes floats like this: f5, f4, f7, f6, ... */
if (!flt_argreg_array[argreg + 1])
{
type = value_type (args[argnum]);
len = TYPE_LENGTH (type);
- val = sh_justify_value_in_reg (args[argnum], len);
+ val = sh_justify_value_in_reg (gdbarch, args[argnum], len);
/* Some decisions have to be made how various types are handled.
This also differs in different ABIs. */
/* Find out the next register to use for a floating point value. */
treat_as_flt = sh_treat_as_flt_p (type);
if (treat_as_flt)
- flt_argreg = sh_next_flt_argreg (len);
+ flt_argreg = sh_next_flt_argreg (gdbarch, len);
/* In contrast to non-FPU CPUs, arguments are never split between
registers and stack. If an argument doesn't fit in the remaining
registers it's always pushed entirely on the stack. */
{
type = value_type (args[argnum]);
len = TYPE_LENGTH (type);
- val = sh_justify_value_in_reg (args[argnum], len);
+ val = sh_justify_value_in_reg (gdbarch, args[argnum], len);
while (len > 0)
{
sh_extract_return_value_fpu (struct type *type, struct regcache *regcache,
void *valbuf)
{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
if (sh_treat_as_flt_p (type))
{
int len = TYPE_LENGTH (type);
- int i, regnum = gdbarch_fp0_regnum (current_gdbarch);
+ int i, regnum = gdbarch_fp0_regnum (gdbarch);
for (i = 0; i < len; i += 4)
- if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
regcache_raw_read (regcache, regnum++, (char *) valbuf + len - 4 - i);
else
regcache_raw_read (regcache, regnum++, (char *) valbuf + i);
sh_store_return_value_fpu (struct type *type, struct regcache *regcache,
const void *valbuf)
{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
if (sh_treat_as_flt_p (type))
{
int len = TYPE_LENGTH (type);
- int i, regnum = gdbarch_fp0_regnum (current_gdbarch);
+ int i, regnum = gdbarch_fp0_regnum (gdbarch);
for (i = 0; i < len; i += 4)
- if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
regcache_raw_write (regcache, regnum++,
(char *) valbuf + len - 4 - i);
else
/* For vectors of 4 floating point registers. */
static int
-fv_reg_base_num (int fv_regnum)
+fv_reg_base_num (struct gdbarch *gdbarch, int fv_regnum)
{
int fp_regnum;
- fp_regnum = gdbarch_fp0_regnum (current_gdbarch)
+ fp_regnum = gdbarch_fp0_regnum (gdbarch)
+ (fv_regnum - FV0_REGNUM) * 4;
return fp_regnum;
}
/* For double precision floating point registers, i.e 2 fp regs.*/
static int
-dr_reg_base_num (int dr_regnum)
+dr_reg_base_num (struct gdbarch *gdbarch, int dr_regnum)
{
int fp_regnum;
- fp_regnum = gdbarch_fp0_regnum (current_gdbarch)
+ fp_regnum = gdbarch_fp0_regnum (gdbarch)
+ (dr_regnum - DR0_REGNUM) * 2;
return fp_regnum;
}
else
if (reg_nr >= DR0_REGNUM && reg_nr <= DR_LAST_REGNUM)
{
- base_regnum = dr_reg_base_num (reg_nr);
+ base_regnum = dr_reg_base_num (gdbarch, reg_nr);
/* Build the value in the provided buffer. */
/* Read the real regs for which this one is an alias. */
}
else if (reg_nr >= FV0_REGNUM && reg_nr <= FV_LAST_REGNUM)
{
- base_regnum = fv_reg_base_num (reg_nr);
+ base_regnum = fv_reg_base_num (gdbarch, reg_nr);
/* Read the real regs for which this one is an alias. */
for (portion = 0; portion < 4; portion++)
}
else if (reg_nr >= DR0_REGNUM && reg_nr <= DR_LAST_REGNUM)
{
- base_regnum = dr_reg_base_num (reg_nr);
+ base_regnum = dr_reg_base_num (gdbarch, reg_nr);
/* We must pay attention to the endiannes. */
sh_register_convert_to_raw (register_type (gdbarch, reg_nr),
}
else if (reg_nr >= FV0_REGNUM && reg_nr <= FV_LAST_REGNUM)
{
- base_regnum = fv_reg_base_num (reg_nr);
+ base_regnum = fv_reg_base_num (gdbarch, reg_nr);
/* Write the real regs for which this one is an alias. */
for (portion = 0; portion < 4; portion++)
};
static const char *
-sh64_register_name (int reg_nr)
+sh64_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] =
{
/* For vectors of 4 floating point registers. */
static int
-sh64_fv_reg_base_num (int fv_regnum)
+sh64_fv_reg_base_num (struct gdbarch *gdbarch, int fv_regnum)
{
int fp_regnum;
- fp_regnum = gdbarch_fp0_regnum (current_gdbarch) +
- (fv_regnum - FV0_REGNUM) * 4;
+ fp_regnum = gdbarch_fp0_regnum (gdbarch) + (fv_regnum - FV0_REGNUM) * 4;
return fp_regnum;
}
/* For double precision floating point registers, i.e 2 fp regs.*/
static int
-sh64_dr_reg_base_num (int dr_regnum)
+sh64_dr_reg_base_num (struct gdbarch *gdbarch, int dr_regnum)
{
int fp_regnum;
- fp_regnum = gdbarch_fp0_regnum (current_gdbarch) +
- (dr_regnum - DR0_REGNUM) * 2;
+ fp_regnum = gdbarch_fp0_regnum (gdbarch) + (dr_regnum - DR0_REGNUM) * 2;
return fp_regnum;
}
/* For pairs of floating point registers */
static int
-sh64_fpp_reg_base_num (int fpp_regnum)
+sh64_fpp_reg_base_num (struct gdbarch *gdbarch, int fpp_regnum)
{
int fp_regnum;
- fp_regnum = gdbarch_fp0_regnum (current_gdbarch) +
- (fpp_regnum - FPP0_REGNUM) * 2;
+ fp_regnum = gdbarch_fp0_regnum (gdbarch) + (fpp_regnum - FPP0_REGNUM) * 2;
return fp_regnum;
}
*/
/* *INDENT-ON* */
static int
-sh64_compact_reg_base_num (int reg_nr)
+sh64_compact_reg_base_num (struct gdbarch *gdbarch, int reg_nr)
{
int base_regnum = reg_nr;
/* floating point register N maps to floating point register N */
else if (reg_nr >= FP0_C_REGNUM
&& reg_nr <= FP_LAST_C_REGNUM)
- base_regnum = reg_nr - FP0_C_REGNUM + gdbarch_fp0_regnum (current_gdbarch);
+ base_regnum = reg_nr - FP0_C_REGNUM + gdbarch_fp0_regnum (gdbarch);
/* double prec register N maps to base regnum for double prec register N */
else if (reg_nr >= DR0_C_REGNUM
&& reg_nr <= DR_LAST_C_REGNUM)
- base_regnum = sh64_dr_reg_base_num (DR0_REGNUM + reg_nr - DR0_C_REGNUM);
+ base_regnum = sh64_dr_reg_base_num (gdbarch,
+ DR0_REGNUM + reg_nr - DR0_C_REGNUM);
/* vector N maps to base regnum for vector register N */
else if (reg_nr >= FV0_C_REGNUM
&& reg_nr <= FV_LAST_C_REGNUM)
- base_regnum = sh64_fv_reg_base_num (FV0_REGNUM + reg_nr - FV0_C_REGNUM);
+ base_regnum = sh64_fv_reg_base_num (gdbarch,
+ FV0_REGNUM + reg_nr - FV0_C_REGNUM);
else if (reg_nr == PC_C_REGNUM)
- base_regnum = gdbarch_pc_regnum (current_gdbarch);
+ base_regnum = gdbarch_pc_regnum (gdbarch);
else if (reg_nr == GBR_C_REGNUM)
base_regnum = 16;
base_regnum = FPSCR_REGNUM; /*???? this register is a mess. */
else if (reg_nr == FPUL_C_REGNUM)
- base_regnum = gdbarch_fp0_regnum (current_gdbarch) + 32;
+ base_regnum = gdbarch_fp0_regnum (gdbarch) + 32;
return base_regnum;
}
sh64_extract_return_value (struct type *type, struct regcache *regcache,
void *valbuf)
{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
int len = TYPE_LENGTH (type);
-
+
if (TYPE_CODE (type) == TYPE_CODE_FLT)
{
if (len == 4)
{
/* Return value stored in gdbarch_fp0_regnum */
regcache_raw_read (regcache,
- gdbarch_fp0_regnum (current_gdbarch), valbuf);
+ gdbarch_fp0_regnum (gdbarch), valbuf);
}
else if (len == 8)
{
regcache_cooked_read (regcache, DR0_REGNUM, buf);
- if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword,
buf, &val);
else
at the most significant end. */
regcache_raw_read (regcache, DEFAULT_RETURN_REGNUM, buf);
- if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
- offset = register_size (current_gdbarch, DEFAULT_RETURN_REGNUM)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
+ offset = register_size (gdbarch, DEFAULT_RETURN_REGNUM)
- len;
else
offset = 0;
sh64_store_return_value (struct type *type, struct regcache *regcache,
const void *valbuf)
{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
char buf[64]; /* more than enough... */
int len = TYPE_LENGTH (type);
if (TYPE_CODE (type) == TYPE_CODE_FLT)
{
- int i, regnum = gdbarch_fp0_regnum (current_gdbarch);
+ int i, regnum = gdbarch_fp0_regnum (gdbarch);
for (i = 0; i < len; i += 4)
- if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
regcache_raw_write (regcache, regnum++,
(char *) valbuf + len - 4 - i);
else
int return_register = DEFAULT_RETURN_REGNUM;
int offset = 0;
- if (len <= register_size (current_gdbarch, return_register))
+ if (len <= register_size (gdbarch, return_register))
{
/* Pad with zeros. */
- memset (buf, 0, register_size (current_gdbarch, return_register));
- if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
- offset = 0; /*register_size (current_gdbarch,
+ memset (buf, 0, register_size (gdbarch, return_register));
+ if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE)
+ offset = 0; /*register_size (gdbarch,
return_register) - len;*/
else
- offset = register_size (current_gdbarch, return_register) - len;
+ offset = register_size (gdbarch, return_register) - len;
memcpy (buf + offset, valbuf, len);
regcache_raw_write (regcache, return_register, buf);
}
static void
-sh64_register_convert_to_virtual (int regnum, struct type *type,
- char *from, char *to)
+sh64_register_convert_to_virtual (struct gdbarch *gdbarch, int regnum,
+ struct type *type, char *from, char *to)
{
- if (gdbarch_byte_order (current_gdbarch) != BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (gdbarch) != BFD_ENDIAN_LITTLE)
{
/* It is a no-op. */
- memcpy (to, from, register_size (current_gdbarch, regnum));
+ memcpy (to, from, register_size (gdbarch, regnum));
return;
}
}
static void
-sh64_register_convert_to_raw (struct type *type, int regnum,
- const void *from, void *to)
+sh64_register_convert_to_raw (struct gdbarch *gdbarch, struct type *type,
+ int regnum, const void *from, void *to)
{
- if (gdbarch_byte_order (current_gdbarch) != BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (gdbarch) != BFD_ENDIAN_LITTLE)
{
/* It is a no-op. */
- memcpy (to, from, register_size (current_gdbarch, regnum));
+ memcpy (to, from, register_size (gdbarch, regnum));
return;
}
if (reg_nr >= DR0_REGNUM
&& reg_nr <= DR_LAST_REGNUM)
{
- base_regnum = sh64_dr_reg_base_num (reg_nr);
+ base_regnum = sh64_dr_reg_base_num (gdbarch, reg_nr);
/* Build the value in the provided buffer. */
/* DR regs are double precision registers obtained by
+ register_size (gdbarch, base_regnum) * portion));
/* We must pay attention to the endianness. */
- sh64_register_convert_to_virtual (reg_nr,
+ sh64_register_convert_to_virtual (gdbarch, reg_nr,
register_type (gdbarch, reg_nr),
temp_buffer, buffer);
else if (reg_nr >= FPP0_REGNUM
&& reg_nr <= FPP_LAST_REGNUM)
{
- base_regnum = sh64_fpp_reg_base_num (reg_nr);
+ base_regnum = sh64_fpp_reg_base_num (gdbarch, reg_nr);
/* Build the value in the provided buffer. */
/* FPP regs are pairs of single precision registers obtained by
else if (reg_nr >= FV0_REGNUM
&& reg_nr <= FV_LAST_REGNUM)
{
- base_regnum = sh64_fv_reg_base_num (reg_nr);
+ base_regnum = sh64_fv_reg_base_num (gdbarch, reg_nr);
/* Build the value in the provided buffer. */
/* FV regs are vectors of single precision registers obtained by
else if (reg_nr >= R0_C_REGNUM
&& reg_nr <= T_C_REGNUM)
{
- base_regnum = sh64_compact_reg_base_num (reg_nr);
+ base_regnum = sh64_compact_reg_base_num (gdbarch, reg_nr);
/* Build the value in the provided buffer. */
regcache_raw_read (regcache, base_regnum, temp_buffer);
else if (reg_nr >= FP0_C_REGNUM
&& reg_nr <= FP_LAST_C_REGNUM)
{
- base_regnum = sh64_compact_reg_base_num (reg_nr);
+ base_regnum = sh64_compact_reg_base_num (gdbarch, reg_nr);
/* Build the value in the provided buffer. */
/* Floating point registers map 1-1 to the media fp regs,
else if (reg_nr >= DR0_C_REGNUM
&& reg_nr <= DR_LAST_C_REGNUM)
{
- base_regnum = sh64_compact_reg_base_num (reg_nr);
+ base_regnum = sh64_compact_reg_base_num (gdbarch, reg_nr);
/* DR_C regs are double precision registers obtained by
concatenating 2 single precision floating point registers. */
+ register_size (gdbarch, base_regnum) * portion));
/* We must pay attention to the endianness. */
- sh64_register_convert_to_virtual (reg_nr,
+ sh64_register_convert_to_virtual (gdbarch, reg_nr,
register_type (gdbarch, reg_nr),
temp_buffer, buffer);
}
else if (reg_nr >= FV0_C_REGNUM
&& reg_nr <= FV_LAST_C_REGNUM)
{
- base_regnum = sh64_compact_reg_base_num (reg_nr);
+ base_regnum = sh64_compact_reg_base_num (gdbarch, reg_nr);
/* Build the value in the provided buffer. */
/* FV_C regs are vectors of single precision registers obtained by
else if (reg_nr == FPUL_C_REGNUM)
{
- base_regnum = sh64_compact_reg_base_num (reg_nr);
+ base_regnum = sh64_compact_reg_base_num (gdbarch, reg_nr);
/* FPUL_C register is floating point register 32,
same size, same endianness. */
if (reg_nr >= DR0_REGNUM
&& reg_nr <= DR_LAST_REGNUM)
{
- base_regnum = sh64_dr_reg_base_num (reg_nr);
+ base_regnum = sh64_dr_reg_base_num (gdbarch, reg_nr);
/* We must pay attention to the endianness. */
- sh64_register_convert_to_raw (register_type (gdbarch, reg_nr),
+ sh64_register_convert_to_raw (gdbarch, register_type (gdbarch, reg_nr),
reg_nr,
buffer, temp_buffer);
else if (reg_nr >= FPP0_REGNUM
&& reg_nr <= FPP_LAST_REGNUM)
{
- base_regnum = sh64_fpp_reg_base_num (reg_nr);
+ base_regnum = sh64_fpp_reg_base_num (gdbarch, reg_nr);
/* Write the real regs for which this one is an alias. */
for (portion = 0; portion < 2; portion++)
else if (reg_nr >= FV0_REGNUM
&& reg_nr <= FV_LAST_REGNUM)
{
- base_regnum = sh64_fv_reg_base_num (reg_nr);
+ base_regnum = sh64_fv_reg_base_num (gdbarch, reg_nr);
/* Write the real regs for which this one is an alias. */
for (portion = 0; portion < 4; portion++)
else if (reg_nr >= R0_C_REGNUM
&& reg_nr <= T_C_REGNUM)
{
- base_regnum = sh64_compact_reg_base_num (reg_nr);
+ base_regnum = sh64_compact_reg_base_num (gdbarch, reg_nr);
/* reg_nr is 32 bit here, and base_regnum is 64 bits. */
if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
offset = 4;
else if (reg_nr >= FP0_C_REGNUM
&& reg_nr <= FP_LAST_C_REGNUM)
{
- base_regnum = sh64_compact_reg_base_num (reg_nr);
+ base_regnum = sh64_compact_reg_base_num (gdbarch, reg_nr);
regcache_raw_write (regcache, base_regnum, buffer);
}
else if (reg_nr >= DR0_C_REGNUM
&& reg_nr <= DR_LAST_C_REGNUM)
{
- base_regnum = sh64_compact_reg_base_num (reg_nr);
+ base_regnum = sh64_compact_reg_base_num (gdbarch, reg_nr);
for (portion = 0; portion < 2; portion++)
{
/* We must pay attention to the endianness. */
- sh64_register_convert_to_raw (register_type (gdbarch, reg_nr),
+ sh64_register_convert_to_raw (gdbarch,
+ register_type (gdbarch, reg_nr),
reg_nr,
buffer, temp_buffer);
else if (reg_nr >= FV0_C_REGNUM
&& reg_nr <= FV_LAST_C_REGNUM)
{
- base_regnum = sh64_compact_reg_base_num (reg_nr);
+ base_regnum = sh64_compact_reg_base_num (gdbarch, reg_nr);
for (portion = 0; portion < 4; portion++)
{
else if (reg_nr == FPUL_C_REGNUM)
{
- base_regnum = sh64_compact_reg_base_num (reg_nr);
+ base_regnum = sh64_compact_reg_base_num (gdbarch, reg_nr);
regcache_raw_write (regcache, base_regnum, buffer);
}
}
else if ((regnum >= DR0_REGNUM && regnum <= DR_LAST_REGNUM))
{
- int fp_regnum = sh64_dr_reg_base_num (regnum);
+ int fp_regnum = sh64_dr_reg_base_num (gdbarch, regnum);
fprintf_filtered (file, "dr%d\t0x%08x%08x\n", regnum - DR0_REGNUM,
(unsigned) get_frame_register_unsigned (frame, fp_regnum),
(unsigned) get_frame_register_unsigned (frame, fp_regnum + 1));
else if ((regnum >= DR0_C_REGNUM && regnum <= DR_LAST_C_REGNUM))
{
- int fp_regnum = sh64_compact_reg_base_num (regnum);
+ int fp_regnum = sh64_compact_reg_base_num (gdbarch, regnum);
fprintf_filtered (file, "dr%d_c\t0x%08x%08x\n", regnum - DR0_C_REGNUM,
(unsigned) get_frame_register_unsigned (frame, fp_regnum),
(unsigned) get_frame_register_unsigned (frame, fp_regnum + 1));
else if ((regnum >= FV0_REGNUM && regnum <= FV_LAST_REGNUM))
{
- int fp_regnum = sh64_fv_reg_base_num (regnum);
+ int fp_regnum = sh64_fv_reg_base_num (gdbarch, regnum);
fprintf_filtered (file, "fv%d\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n",
regnum - FV0_REGNUM,
(unsigned) get_frame_register_unsigned (frame, fp_regnum),
else if ((regnum >= FV0_C_REGNUM && regnum <= FV_LAST_C_REGNUM))
{
- int fp_regnum = sh64_compact_reg_base_num (regnum);
+ int fp_regnum = sh64_compact_reg_base_num (gdbarch, regnum);
fprintf_filtered (file, "fv%d_c\t0x%08x\t0x%08x\t0x%08x\t0x%08x\n",
regnum - FV0_C_REGNUM,
(unsigned) get_frame_register_unsigned (frame, fp_regnum),
else if (regnum >= FPP0_REGNUM && regnum <= FPP_LAST_REGNUM)
{
- int fp_regnum = sh64_fpp_reg_base_num (regnum);
+ int fp_regnum = sh64_fpp_reg_base_num (gdbarch, regnum);
fprintf_filtered (file, "fpp%d\t0x%08x\t0x%08x\n", regnum - FPP0_REGNUM,
(unsigned) get_frame_register_unsigned (frame, fp_regnum),
(unsigned) get_frame_register_unsigned (frame, fp_regnum + 1));
else if (regnum >= R0_C_REGNUM && regnum <= R_LAST_C_REGNUM)
{
- int c_regnum = sh64_compact_reg_base_num (regnum);
+ int c_regnum = sh64_compact_reg_base_num (gdbarch, regnum);
fprintf_filtered (file, "r%d_c\t0x%08x\n", regnum - R0_C_REGNUM,
(unsigned) get_frame_register_unsigned (frame, c_regnum));
}
/* Return the name of register REGNUM. */
static const char *
-sparc32_register_name (int regnum)
+sparc32_register_name (struct gdbarch *gdbarch, int regnum)
{
if (regnum >= 0 && regnum < SPARC32_NUM_REGS)
return sparc32_register_names[regnum];
/* Return the name of register REGNUM. */
static const char *
-sparc64_register_name (int regnum)
+sparc64_register_name (struct gdbarch *gdbarch, int regnum)
{
if (regnum >= 0 && regnum < SPARC64_NUM_REGS)
return sparc64_register_names[regnum];
/* Registers. */
static const char *
-spu_register_name (int reg_nr)
+spu_register_name (struct gdbarch *gdbarch, int reg_nr)
{
static char *register_names[] =
{
from an architecture-provided pseudo_register_name method. */
const char *
-tdesc_register_name (int regno)
+tdesc_register_name (struct gdbarch *gdbarch, int regno)
{
- struct tdesc_reg *reg = tdesc_find_register (current_gdbarch, regno);
- int num_regs = gdbarch_num_regs (current_gdbarch);
- int num_pseudo_regs = gdbarch_num_pseudo_regs (current_gdbarch);
+ struct tdesc_reg *reg = tdesc_find_register (gdbarch, regno);
+ int num_regs = gdbarch_num_regs (gdbarch);
+ int num_pseudo_regs = gdbarch_num_pseudo_regs (gdbarch);
if (reg != NULL)
return reg->name;
if (regno >= num_regs && regno < num_regs + num_pseudo_regs)
{
- struct tdesc_arch_data *data = gdbarch_data (current_gdbarch,
- tdesc_data);
+ struct tdesc_arch_data *data = gdbarch_data (gdbarch, tdesc_data);
gdb_assert (data->pseudo_register_name != NULL);
- return data->pseudo_register_name (regno);
+ return data->pseudo_register_name (gdbarch, regno);
}
return "";
/* Return the name of register REGNO, from the target description or
from an architecture-provided pseudo_register_name method. */
-const char *tdesc_register_name (int regno);
+const char *tdesc_register_name (struct gdbarch *gdbarch, int regno);
/* Check whether REGNUM is a member of REGGROUP using the target
description. Return -1 if the target description does not
};
static const char *
-v850_register_name (int regnum)
+v850_register_name (struct gdbarch *gdbarch, int regnum)
{
static const char *v850_reg_names[] =
{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
}
static const char *
-v850e_register_name (int regnum)
+v850e_register_name (struct gdbarch *gdbarch, int regnum)
{
static const char *v850e_reg_names[] =
{
v850_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
{
return frame_unwind_register_unsigned (next_frame,
- gdbarch_sp_regnum (current_gdbarch));
+ gdbarch_sp_regnum (gdbarch));
}
static CORE_ADDR
v850_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
{
return frame_unwind_register_unsigned (next_frame,
- gdbarch_pc_regnum (current_gdbarch));
+ gdbarch_pc_regnum (gdbarch));
}
static struct frame_id
/* Return the name of register REGNUM. */
static const char *
-vax_register_name (int regnum)
+vax_register_name (struct gdbarch *gdbarch, int regnum)
{
static char *register_names[] =
{
Returns the name of the standard Xstormy16 register N. */
static const char *
-xstormy16_register_name (int regnum)
+xstormy16_register_name (struct gdbarch *gdbarch, int regnum)
{
static char *register_names[] = {
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
/* Returns the name of a register. */
static const char *
-xtensa_register_name (int regnum)
+xtensa_register_name (struct gdbarch *gdbarch, int regnum)
{
/* Return the name stored in the register map. */
- if (regnum >= 0 && regnum < gdbarch_num_regs (current_gdbarch)
- + gdbarch_num_pseudo_regs (current_gdbarch))
- return gdbarch_tdep (current_gdbarch)->regmap[regnum].name;
+ if (regnum >= 0 && regnum < gdbarch_num_regs (gdbarch)
+ + gdbarch_num_pseudo_regs (gdbarch))
+ return gdbarch_tdep (gdbarch)->regmap[regnum].name;
internal_error (__FILE__, __LINE__, _("invalid register %d"), regnum);
return 0;
gdb_byte *buffer)
{
DEBUGTRACE ("xtensa_pseudo_register_read (... regnum = %d (%s) ...)\n",
- regnum, xtensa_register_name (regnum));
+ regnum, xtensa_register_name (gdbarch, regnum));
if (regnum == gdbarch_num_regs (gdbarch)
+ gdbarch_num_pseudo_regs (gdbarch))
if ((flags & xtTargetFlagsNonVisibleRegs) == 0)
{
warning (_("cannot read register %s"),
- xtensa_register_name (regnum));
+ xtensa_register_name (gdbarch, regnum));
return;
}
}
const gdb_byte *buffer)
{
DEBUGTRACE ("xtensa_pseudo_register_write (... regnum = %d (%s) ...)\n",
- regnum, xtensa_register_name (regnum));
+ regnum, xtensa_register_name (gdbarch, regnum));
if (regnum == gdbarch_num_regs (gdbarch)
+ gdbarch_num_pseudo_regs (gdbarch))
if ((flags & xtTargetFlagsNonVisibleRegs) == 0)
{
warning (_("cannot write register %s"),
- xtensa_register_name (regnum));
+ xtensa_register_name (gdbarch, regnum));
return;
}
}
"*this 0x%08x, regnum %d (%s), ...)\n",
(unsigned int) next_frame,
*this_cache ? (unsigned int) *this_cache : 0, regnum,
- xtensa_register_name (regnum));
+ xtensa_register_name (gdbarch, regnum));
if (regnum ==gdbarch_pc_regnum (gdbarch))
saved_reg = cache->ra;
projects / binutils-gdb.git / commitdiff