add pipeline operands
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 16 May 2020 20:17:09 +0000 (21:17 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 16 May 2020 20:17:09 +0000 (21:17 +0100)
3d_gpu/architecture/pipeline_operands.mdwn [new file with mode: 0644]

diff --git a/3d_gpu/architecture/pipeline_operands.mdwn b/3d_gpu/architecture/pipeline_operands.mdwn
new file mode 100644 (file)
index 0000000..404e6fe
--- /dev/null
@@ -0,0 +1,69 @@
+# Condition Register Pipeline
+
+Input:
+'''
+    64 - Port 1   32 - Port 2
+    -----------   -----------
+    RA            CR
+'''
+
+Output:
+'''
+    64 - Port 1   32 - Port 2
+    -----------   -----------
+    RA            CR
+'''
+
+# Branch Register Pipeline
+
+Input:
+'''
+    insn       PC   32-CR  64-SPR1  64-SPR2    64-SPR3
+    ----       --   --     ----     ----       ----
+    op_b       CIA  xx     xx       xx         xx
+    op_ba      CIA  xx     xx       xx         xx
+    op_bl      CIA  xx     xx       xx         xx
+    op_bla     CIA  xx     xx       xx         xx
+    op_bc      CIA  CR     xx       CTR        xx
+    op_bca     CIA  CR     xx       CTR        xx
+    op_bcl     CIA  CR     xx       CTR        xx
+    op_bcla    CIA  CR     xx       CTR        xx
+    op_bclr    CIA  CR     LR       CTR        xx
+    op_bclrl   CIA  CR     LR       CTR        xx
+    op_bcctr   CIA  CR     xx       CTR        xx
+    op_bcctrl  CIA  CR     xx       CTR        xx
+    op_bctar   CIA  CR     TAR      CTR        xx
+    op_bctarl  CIA  CR     TAR      CTR        xx
+
+    op_sc      CIA  xx     xx       xx         MSR
+    op_scv     CIA  xx     LR       SRR1       MSR
+    op_rfscv   CIA  xx     LR       CTR        MSR
+    op_rfid    CIA  xx     SRR0     SRR1       MSR
+    op_hrfid   CIA  xx     HSRR0    HSRR1      MSR
+'''
+
+Output:
+'''
+    insn       PC   LR   64-SPR2
+    ----       --   --   ----
+    op_b       NIA  xx   xx
+    op_ba      NIA  xx   xx
+    op_bl      NIA  xx   xx
+    op_bla     NIA  xx   xx
+    op_bc      NIA  xx   CTR
+    op_bca     NIA  xx   CTR
+    op_bcl     NIA  xx   CTR
+    op_bcla    NIA  xx   CTR
+    op_bclr    NIA  LR   CTR
+    op_bclrl   NIA  LR   CTR
+    op_bcctr   NIA  xx   CTR
+    op_bcctrl  NIA  xx   CTR
+    op_bctar   NIA  xx   CTR
+    op_bctarl  NIA  xx   CTR
+
+    op_sc      NIA  xx   xx
+    op_scv     NIA  LR   xx
+    op_rfscv   NIA  LR   CTR
+    op_rfid    NIA  xx   xx
+    op_hrfid   NIA  xx   xx
+'''