2010-10-04 David Daney <ddaney@caviumnetworks.com>
authorDavid Daney <ddaney@avtrex.com>
Mon, 4 Oct 2010 15:24:49 +0000 (15:24 +0000)
committerDavid Daney <ddaney@avtrex.com>
Mon, 4 Oct 2010 15:24:49 +0000 (15:24 +0000)
* config/tc-mips.c (mips_fix_cn63xxp1): New variable.
(mips_ip):  Add errata work around when mips_fix_cn63xxp1 set.
(OPTION_FIX_CN63XXP1, OPTION_NO_FIX_CN63XXP1): New enum options
enumerations.
(md_longopts): Add options for -mfix-cn63xxp1 and -mno-fix-cn63xxp1.
(md_parse_option): Handle OPTION_FIX_CN63XXP1 and
OPTION_NO_FIX_CN63XXP1.
(md_show_usage): Add documentation for -mfix-cn63xxp1.
* doc/c-mips.texi (-mfix-cn63xxp1, -mno-fix-cn63xxp1): Document
the new options.

2010-10-04  David Daney  <ddaney@caviumnetworks.com>

* gas/mips/mips.exp (octeon-pref): Run the new test.
* gas/mips/octeon-pref.s: New test.
* gas/mips/octeon-pref.d: New expected results for the new test.

gas/ChangeLog
gas/config/tc-mips.c
gas/doc/c-mips.texi
gas/testsuite/ChangeLog
gas/testsuite/gas/mips/mips.exp
gas/testsuite/gas/mips/octeon-pref.d [new file with mode: 0644]
gas/testsuite/gas/mips/octeon-pref.s [new file with mode: 0644]

index bafa80f00215e993a5679290c93f55650b8f1563..6f3529ecb5138b775812f643f505ffe513ba8230 100644 (file)
@@ -1,3 +1,16 @@
+2010-10-04  David Daney  <ddaney@caviumnetworks.com>
+
+       * config/tc-mips.c (mips_fix_cn63xxp1): New variable.
+       (mips_ip):  Add errata work around when mips_fix_cn63xxp1 set.
+       (OPTION_FIX_CN63XXP1, OPTION_NO_FIX_CN63XXP1): New enum options
+       enumerations.
+       (md_longopts): Add options for -mfix-cn63xxp1 and -mno-fix-cn63xxp1.
+       (md_parse_option): Handle OPTION_FIX_CN63XXP1 and
+       OPTION_NO_FIX_CN63XXP1.
+       (md_show_usage): Add documentation for -mfix-cn63xxp1.
+       * doc/c-mips.texi (-mfix-cn63xxp1, -mno-fix-cn63xxp1): Document
+       the new options.
+
 2010-09-29  Bernd Schmidt  <bernds@codesourcery.com>
 
        * gas/tic6x/insns-bad-1.s: Remove test for readonly tscl.
index 145f8b62ea41a2bbd366c70dab3072b08af4634c..d35c24c1f2b6db908c84f9c0b2f869374d72a792 100644 (file)
@@ -786,6 +786,9 @@ static int mips_fix_vr4130;
 /* ...likewise -mfix-24k.  */
 static int mips_fix_24k;
 
+/* ...likewise -mfix-cn63xxp1 */
+static bfd_boolean mips_fix_cn63xxp1;
+
 /* We don't relax branches by default, since this causes us to expand
    `la .l2 - .l1' if there's a branch between .l1 and .l2, because we
    fail to compute the offset before expanding the macro to the most
@@ -9401,7 +9404,26 @@ do_msbd:
                         ip->insn_mo->name,
                         (unsigned long) imm_expr.X_add_number);
              if (*args == 'k')
-               INSERT_OPERAND (CACHE, *ip, imm_expr.X_add_number);
+               {
+                 if (mips_fix_cn63xxp1 && strcmp ("pref", insn->name) == 0)
+                   switch (imm_expr.X_add_number)
+                     {
+                     case 5:
+                     case 25:
+                     case 26:
+                     case 27:
+                     case 28:
+                     case 29:
+                     case 30:
+                     case 31:  /* These are ok.  */
+                       break;
+
+                     default:  /* The rest must be changed to 28.  */
+                       imm_expr.X_add_number = 28;
+                       break;
+                     }
+                 INSERT_OPERAND (CACHE, *ip, imm_expr.X_add_number);
+               }
              else if (*args == 'h')
                INSERT_OPERAND (PREFX, *ip, imm_expr.X_add_number);
              else
@@ -11285,6 +11307,8 @@ enum options
     OPTION_NO_FIX_VR4120,
     OPTION_FIX_VR4130,
     OPTION_NO_FIX_VR4130,
+    OPTION_FIX_CN63XXP1,
+    OPTION_NO_FIX_CN63XXP1,
     OPTION_TRAP,
     OPTION_BREAK,
     OPTION_EB,
@@ -11379,6 +11403,8 @@ struct option md_longopts[] =
   {"mno-fix-vr4130", no_argument, NULL, OPTION_NO_FIX_VR4130},
   {"mfix-24k",    no_argument, NULL, OPTION_FIX_24K},
   {"mno-fix-24k", no_argument, NULL, OPTION_NO_FIX_24K},
+  {"mfix-cn63xxp1", no_argument, NULL, OPTION_FIX_CN63XXP1},
+  {"mno-fix-cn63xxp1", no_argument, NULL, OPTION_NO_FIX_CN63XXP1},
 
   /* Miscellaneous options.  */
   {"trap", no_argument, NULL, OPTION_TRAP},
@@ -11672,6 +11698,14 @@ md_parse_option (int c, char *arg)
       mips_fix_vr4130 = 0;
       break;
 
+    case OPTION_FIX_CN63XXP1:
+      mips_fix_cn63xxp1 = TRUE;
+      break;
+
+    case OPTION_NO_FIX_CN63XXP1:
+      mips_fix_cn63xxp1 = FALSE;
+      break;
+
     case OPTION_RELAX_BRANCH:
       mips_relax_branch = 1;
       break;
@@ -15623,6 +15657,7 @@ MIPS options:\n\
 -mfix-vr4120           work around certain VR4120 errata\n\
 -mfix-vr4130           work around VR4130 mflo/mfhi errata\n\
 -mfix-24k              insert a nop after ERET and DERET instructions\n\
+-mfix-cn63xxp1         work around CN63XXP1 PREF errata\n\
 -mgp32                 use 32-bit GPRs, regardless of the chosen ISA\n\
 -mfp32                 use 32-bit FPRs, regardless of the chosen ISA\n\
 -msym32                        assume all symbols have 32-bit values\n\
index 641e60f4cc380e84a4ae56b667ae581801bae0b8..715091eff60d218ac60fa81eee2ba04d8abf3b76 100644 (file)
@@ -200,6 +200,11 @@ Insert nops to work around the VR4130 @samp{mflo}/@samp{mfhi} errata.
 @itemx -no-mfix-24k
 Insert nops to work around the 24K @samp{eret}/@samp{deret} errata.
 
+@item -mfix-cn63xxp1
+@itemx -mno-fix-cn63xxp1
+Replace @code{pref} hints 0 - 4 and 6 - 24 with hint 28 to work around
+certain CN63XXP1 errata.
+
 @item -m4010
 @itemx -no-m4010
 Generate code for the LSI @sc{r4010} chip.  This tells the assembler to
index 671cc03a307bae53f68c41c4572e638fad41e13f..8d2f8527e64d3cea95e17649d899518ac745c637 100644 (file)
@@ -1,3 +1,9 @@
+2010-10-04  David Daney  <ddaney@caviumnetworks.com>
+
+       * gas/mips/mips.exp (octeon-pref): Run the new test.
+       * gas/mips/octeon-pref.s: New test.
+       * gas/mips/octeon-pref.d: New expected results for the new test.
+
 2010-09-29  Alan Modra  <amodra@gmail.com>
 
        * gas/all/fwdexp.d, * gas/all/fwdexp.s: New test.
index 34fd01aef74893e496b04f8cbcac2687ab539bf9..024e404596284e72f210095a81a40db57314af8d 100644 (file)
@@ -831,6 +831,7 @@ if { [istarget mips*-*-vxworks*] } {
     run_dump_test_arches "octeon"      [mips_arch_list_matching octeon]
     run_list_test_arches "octeon-ill" "" \
                                        [mips_arch_list_matching octeon]
+    run_dump_test_arches "octeon-pref" [mips_arch_list_matching octeon]
 
     run_dump_test "smartmips"
     run_dump_test "mips32-dsp"
diff --git a/gas/testsuite/gas/mips/octeon-pref.d b/gas/testsuite/gas/mips/octeon-pref.d
new file mode 100644 (file)
index 0000000..6dcb184
--- /dev/null
@@ -0,0 +1,42 @@
+#as: -march=octeon -64 -mfix-cn63xxp1
+#objdump: -M reg-names=numeric -dr
+#name: MIPS octeon-pref mfix-cn63xxp1
+
+.*:     file format .*
+
+Disassembly of section .text:
+
+[0-9a-f]+ <foo>:
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc050000        pref    0x5,0\(\$0\)
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc190000        pref    0x19,0\(\$0\)
+.*:    cc1a0000        pref    0x1a,0\(\$0\)
+.*:    cc1b0000        pref    0x1b,0\(\$0\)
+.*:    cc1c0000        pref    0x1c,0\(\$0\)
+.*:    cc1d0000        pref    0x1d,0\(\$0\)
+.*:    cc1e0000        pref    0x1e,0\(\$0\)
+.*:    cc1f0000        pref    0x1f,0\(\$0\)
+#pass
diff --git a/gas/testsuite/gas/mips/octeon-pref.s b/gas/testsuite/gas/mips/octeon-pref.s
new file mode 100644 (file)
index 0000000..dcdb7d0
--- /dev/null
@@ -0,0 +1,36 @@
+       .text
+       .set noreorder
+
+foo:
+       pref 0,0($0)
+       pref 1,0($0)
+       pref 2,0($0)
+       pref 3,0($0)
+       pref 4,0($0)
+       pref 5,0($0)
+       pref 6,0($0)
+       pref 7,0($0)
+       pref 8,0($0)
+       pref 9,0($0)
+       pref 10,0($0)
+       pref 11,0($0)
+       pref 12,0($0)
+       pref 13,0($0)
+       pref 14,0($0)
+       pref 15,0($0)
+       pref 16,0($0)
+       pref 17,0($0)
+       pref 18,0($0)
+       pref 19,0($0)
+       pref 20,0($0)
+       pref 21,0($0)
+       pref 22,0($0)
+       pref 23,0($0)
+       pref 24,0($0)
+       pref 25,0($0)
+       pref 26,0($0)
+       pref 27,0($0)
+       pref 28,0($0)
+       pref 29,0($0)
+       pref 30,0($0)
+       pref 31,0($0)