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Merge pull request #914 from YosysHQ/xc7srl
authorEddie Hung <eddieh@ece.ubc.ca>
Mon, 22 Apr 2019 20:31:30 +0000 (13:31 -0700)
committerGitHub <noreply@github.com>
Mon, 22 Apr 2019 20:31:30 +0000 (13:31 -0700)
synth_xilinx to now infer SRL16E/SRLC32E


Trivial merge