re PR rtl-optimization/65693 (ICE in assign_by_spills, at lra-assigns.c:1419)

	PR target/65693
	* config/i386/i386.md (*udivmod<mode>4_pow2): Allow
	any pow2 integer in between 2 and 0x80000000U inclusive.

	* gcc.target/i386/pr65693.c: New test.

From-SVN: r221942

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e246510b3f61c1ff5a9b702e51e0c7320ce179ad..7a2a9f8ef53a73cb3ae600741f1cbef6072158fb 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2015-04-09  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/65693
+       * config/i386/i386.md (*udivmod<mode>4_pow2): Allow
+       any pow2 integer in between 2 and 0x80000000U inclusive.
+
 2015-04-08  Segher Boessenkool  <segher@kernel.crashing.org>
 
        PR rtl-optimization/65693

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index cf63afde16e257ef58ff12444af4833320457310..e1c82fefc0d6b44feb02f038c389cd5034b9f043 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -7340,7 +7340,7 @@
    (set (match_operand:SWI48 1 "register_operand" "=r")
        (umod:SWI48 (match_dup 2) (match_dup 3)))
    (clobber (reg:CC FLAGS_REG))]
-  "UINTVAL (operands[3]) - 2 < <MODE_SIZE> * BITS_PER_UNIT
+  "IN_RANGE (INTVAL (operands[3]), 2, HOST_WIDE_INT_UC (0x80000000))
    && (UINTVAL (operands[3]) & (UINTVAL (operands[3]) - 1)) == 0"
   "#"
   "&& 1"

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index ba6f84142d86da6d27bc31c82691b819d7db08f7..667d42e29baf37a7257fc5417057601fee06e55e 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2015-04-09  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/65693
+       * gcc.target/i386/pr65693.c: New test.
+
 2015-04-08  Ilya Enkovich  <ilya.enkovich@intel.com>
 
        * gcc.dg/lto/chkp-static-bounds_0.c: New.

diff --git a/gcc/testsuite/gcc.target/i386/pr65693.c b/gcc/testsuite/gcc.target/i386/pr65693.c
new file mode 100644 (file)
index 0000000..bc380e4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr65693.c
@@ -0,0 +1,13 @@
+/* PR target/65693 */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int a;
+
+void
+foo (int (*fn) (int, int, int), unsigned int b)
+{
+  unsigned long *c = (unsigned long *) __builtin_alloca (b);
+  a = *c;
+  register int d asm ("edx") = fn (0, 0, d);
+}