[arm] XFAIL advsimd-intrinsics/vld1x2.c

This recently added test fails on arm. We haven't implemented these intrinsics for arm
(any volunteers?) so for now let's XFAIL these on that target.
Also, the float64 versions of these intrinsics are not supposed to be available on arm
so this patch slightly adjusts the test to not include them for aarch32.
In any case the entire test is XFAILed on arm, so this doesn't have any noticeable
effect.

The same number of tests (PASS) still occur on aarch64 but now they appear as XFAIL
rather than FAIL on arm.

    * gcc.target/aarch64/advsimd-intrinsics/vld1x2.c: Make float64
    tests specific to aarch64.  XFAIL test on arm.

From-SVN: r257090

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 5fa94c88af95b87554114b609c8a62feda307e88..65bfe0fc4400849804a7d4c185c3733e3179e493 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2018-01-26  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * gcc.target/aarch64/advsimd-intrinsics/vld1x2.c: Make float64
+       tests specific to aarch64.  XFAIL test on arm.
+
 2018-01-26  Jakub Jelinek  <jakub@redhat.com>
 
        PR rtl-optimization/83985

diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c
index 0a43d0daf8c39949d447d29d7a5fa37a60b97134..92a139bc52313ef52d8bd97c6eb64dd8a7f7769a 100644 (file)
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c
@@ -1,3 +1,5 @@
+/* We haven't implemented these intrinsics for arm yet.  */
+/* { dg-xfail-if "" { arm*-*-* } } */
 /* { dg-do run } */
 /* { dg-options "-O3" } */
 
@@ -26,7 +28,7 @@ test_vld##SUFFIX##_x2 ()                      \
   return 0;                                    \
 }
 
-#define VARIANTS(VARIANT)      \
+#define VARIANTS_1(VARIANT)    \
 VARIANT (uint8, 8, _u8)                \
 VARIANT (uint16, 4, _u16)      \
 VARIANT (uint32, 2, _u32)      \
@@ -39,7 +41,6 @@ VARIANT (poly8, 8, _p8)               \
 VARIANT (poly16, 4, _p16)      \
 VARIANT (float16, 4, _f16)     \
 VARIANT (float32, 2, _f32)     \
-VARIANT (float64, 1, _f64)     \
 VARIANT (uint8, 16, q_u8)      \
 VARIANT (uint16, 8, q_u16)     \
 VARIANT (uint32, 4, q_u32)     \
@@ -51,8 +52,15 @@ VARIANT (int64, 2, q_s64)    \
 VARIANT (poly8, 16, q_p8)      \
 VARIANT (poly16, 8, q_p16)     \
 VARIANT (float16, 8, q_f16)    \
-VARIANT (float32, 4, q_f32)    \
+VARIANT (float32, 4, q_f32)
+
+#ifdef __aarch64__
+#define VARIANTS(VARIANT) VARIANTS_1(VARIANT)  \
+VARIANT (float64, 1, _f64)                     \
 VARIANT (float64, 2, q_f64)
+#else
+#define VARIANTS(VARIANT) VARIANTS_1(VARIANT)
+#endif
 
 /* Tests of vld1_x2 and vld1q_x2.  */
 VARIANTS (TESTMETH)