Merge yet again with the main repository.

diff --cc src/arch/arm/isa/insts/m5ops.isa
index a157b414c03a87373650a5117d2ea2147fc4ca74,f20908d4f835b18d11c4bff515a761f808ee071e..da2e1088606f5ba13f9ac1f11817fdbdcc641563
--- 1/src/arch/arm/isa/insts/m5ops.isa
--- 2/src/arch/arm/isa/insts/m5ops.isa
+++ b/src/arch/arm/isa/insts/m5ops.isa
@@@ -190,7 -190,13 +190,9 @@@ let {
      exec_output += PredOpExecute.subst(loadsymbolIop)
  
      initparamCode = '''
-     Rt = PseudoInst::initParam(xc->tcBase());
 -#if FULL_SYSTEM
+     uint64_t ip_val  = PseudoInst::initParam(xc->tcBase());
+     R0 = bits(ip_val, 31, 0);
+     R1 = bits(ip_val, 63, 32);
 -#else
 -    PseudoInst::panicFsOnlyPseudoInst("initparam");
 -#endif
      '''
  
      initparamIop = InstObjParams("initparam", "Initparam", "PredOp",

diff --cc src/arch/mips/faults.cc
Simple merge

diff --cc src/arch/mips/faults.hh
index bce828ec14dc74e728b7d9e25d5357bb0fb99f1a,76d4fff2331e16ea1b2c6b9d8ad37f3a5e7f602f..b90c38e99f91f0b01362575aa8116592d5604882
--- 1/src/arch/mips/faults.hh
--- 2/src/arch/mips/faults.hh
+++ b/src/arch/mips/faults.hh
@@@ -164,10 -165,10 +166,10 @@@ class CoprocessorUnusableFault : publi
              StaticInstPtr inst = StaticInst::nullStaticInstPtr)
      {
          MipsFault<CoprocessorUnusableFault>::invoke(tc, inst);
 -        if (FULL_SYSTEM) {
 +        if (FullSystem) {
              CauseReg cause = tc->readMiscReg(MISCREG_CAUSE);
              cause.ce = coProcID;
-             tc->setMiscReg(MISCREG_CAUSE, cause);
+             tc->setMiscRegNoEffect(MISCREG_CAUSE, cause);
          }
      }
  };
@@@ -250,10 -252,11 +253,11 @@@ class TlbFault : public AddressFault<T
      invoke(ThreadContext * tc,
              StaticInstPtr inst = StaticInst::nullStaticInstPtr)
      {
 -        if (FULL_SYSTEM) {
 +        if (FullSystem) {
-             DPRINTF(MipsPRA, "Fault %s encountered.\n", name());
-             tc->pcState(this->vect(tc));
+             DPRINTF(MipsPRA, "Fault %s encountered.\n", this->name());
+             Addr vect = this->vect(tc);
              setTlbExceptionState(tc, this->code());
+             tc->pcState(vect);
          } else {
              AddressFault<T>::invoke(tc, inst);
          }

diff --cc src/arch/mips/isa/decoder.isa
Simple merge

diff --cc src/arch/mips/tlb.cc
index 057fb5e76a5f3bc2831be168c440138782148b49,b3ed096213bd7eef1ab42cff44584e93a82d7c6f..d28ef8231b8443d095452cb53cef76c0e1a99baa
--- 1/src/arch/mips/tlb.cc
--- 2/src/arch/mips/tlb.cc
+++ b/src/arch/mips/tlb.cc
@@@ -309,29 -378,99 +311,17 @@@ TLB::translateInst(RequestPtr req, Thre
  Fault
  TLB::translateData(RequestPtr req, ThreadContext *tc, bool write)
  {
 -#if !FULL_SYSTEM
 -    //@TODO: This should actually use TLB instead of going directly
 -    //       to the page table in syscall mode.
 -    /**
 -     * Check for alignment faults
 -     */
 -    if (req->getVaddr() & (req->getSize() - 1)) {
 -        DPRINTF(TLB, "Alignment Fault on %#x, size = %d", req->getVaddr(),
 -                req->getSize());
 -        return new AddressErrorFault(req->getVaddr(), write);
 -    }
 -
 +    if (!FullSystem) {
-         //@TODO: This should actually use TLB instead of going directly
-         //       to the page table in syscall mode.
-         /**
-          * Check for alignment faults
-          */
-         if (req->getVaddr() & (req->getSize() - 1)) {
-             DPRINTF(TLB, "Alignment Fault on %#x, size = %d", req->getVaddr(),
-                     req->getSize());
-             return new AddressErrorFault(req->getVaddr(), write);
-         }
- 
- 
 +        Process * p = tc->getProcessPtr();
  
 -    Process * p = tc->getProcessPtr();
 +        Fault fault = p->pTable->translate(req);
 +        if (fault != NoFault)
 +            return fault;
  
 -    Fault fault = p->pTable->translate(req);
 -    if (fault != NoFault)
 -        return fault;
 -
 -    return NoFault;
 -#else
 -    Addr vaddr = req->getVaddr();
 -
 -    bool misaligned = (req->getSize() - 1) & vaddr;
 -
 -    if (IsKSeg0(vaddr)) {
 -        // Address will not be translated through TLB, set response, and go!
 -        req->setPaddr(KSeg02Phys(vaddr));
 -        if (getOperatingMode(tc->readMiscReg(MISCREG_STATUS)) != mode_kernel ||
 -                misaligned) {
 -            return new AddressErrorFault(vaddr, true);
 -        }
 -    } else if(IsKSeg1(vaddr)) {
 -      // Address will not be translated through TLB, set response, and go!
 -      req->setPaddr(KSeg02Phys(vaddr));
 +        return NoFault;
      } else {
 -        /* 
 -         * This is an optimization - smallPages is updated every time a TLB
 -         * operation is performed. That way, we don't need to look at
 -         * Config3 _ SP and PageGrain _ ESP every time we do a TLB lookup
 -         */
 -        Addr VPN = (vaddr >> 11) & 0xFFFFFFFC;
 -        if (smallPages == 1) {
 -            VPN = vaddr >> 11;
 -        }
 -        uint8_t Asid = req->getAsid();
 -        PTE *pte = lookup(VPN, Asid);
 -        if (misaligned) {
 -            return new AddressErrorFault(vaddr, true);
 -        }
 -        if (pte != NULL) {
 -            // Ok, found something
 -            /* Check for valid bits */
 -            int EvenOdd;
 -            bool Valid;
 -            bool Dirty;
 -            if ((((vaddr >> pte->AddrShiftAmount) & 1)) == 0) {
 -                // Check even bits
 -                Valid = pte->V0;
 -                Dirty = pte->D0;
 -                EvenOdd = 0;
 -            } else {
 -                // Check odd bits
 -                Valid = pte->V1;
 -                Dirty = pte->D1;
 -                EvenOdd = 1;
 -            }
 -
 -            if (Valid == false) {
 -                return new TlbInvalidFault(Asid, vaddr, VPN, write);
 -            } else {
 -                // Ok, this is really a match, set paddr
 -                if (!Dirty && write) {
 -                    return new TlbModifiedFault(Asid, vaddr, VPN);
 -                }
 -                Addr PAddr;
 -                if (EvenOdd == 0) {
 -                    PAddr = pte->PFN0;
 -                } else {
 -                    PAddr = pte->PFN1;
 -                }
 -                PAddr >>= (pte->AddrShiftAmount - 12);
 -                PAddr <<= pte->AddrShiftAmount;
 -                PAddr |= (vaddr & pte->OffsetMask);
 -                req->setPaddr(PAddr);
 -            }
 -        } else {
 -            // Didn't find any match, return a TLB Refill Exception
 -            return new TlbRefillFault(Asid, vaddr, VPN, write);
 -        }
 +        panic("translateData not implemented in MIPS.\n");
      }
 -    return checkCacheability(req);
 -#endif
  }
  
  Fault

diff --cc src/cpu/base.hh
Simple merge

diff --cc src/cpu/o3/commit_impl.hh
Simple merge

diff --cc src/cpu/o3/decode_impl.hh
Simple merge

diff --cc src/cpu/o3/rename_impl.hh
Simple merge

diff --cc src/cpu/pc_event.cc
Simple merge

diff --cc src/dev/io_device.cc
Simple merge

diff --cc src/mem/SConscript
Simple merge

diff --cc src/sim/System.py
Simple merge

diff --cc src/sim/pseudo_inst.cc
Simple merge

diff --cc src/sim/system.cc
index 3051cb64b5eed4cee140589bd8e8a2a5add9ef4d,556a919d5c5807ae91fa3a321af02b8e01a2631b..d3bee1ad19d7ebfd9e32f653b4d5a72a0f1583a9
--- 1/src/sim/system.cc
--- 2/src/sim/system.cc
+++ b/src/sim/system.cc
@@@ -43,16 -54,22 +55,17 @@@
  #include "config/the_isa.hh"
  #include "cpu/thread_context.hh"
  #include "debug/Loader.hh"
+ #include "debug/WorkItems.hh"
 +#include "kern/kernel_stats.hh"
  #include "mem/mem_object.hh"
  #include "mem/physical.hh"
 +#include "mem/vport.hh"
 +#include "params/System.hh"
  #include "sim/byteswap.hh"
  #include "sim/debug.hh"
 +#include "sim/full_system.hh"
  #include "sim/system.hh"
  
 -#if FULL_SYSTEM
 -#include "arch/vtophys.hh"
 -#include "kern/kernel_stats.hh"
 -#include "mem/vport.hh"
 -#else
 -#include "params/System.hh"
 -#endif
 -
  using namespace std;
  using namespace TheISA;
  
@@@ -156,8 -178,16 +170,11 @@@ System::System(Params *p
  
  System::~System()
  {
 -#if FULL_SYSTEM
      delete kernelSymtab;
      delete kernel;
 -#else
 -    panic("System::fixFuncEventAddr needs to be rewritten "
 -          "to work with syscall emulation");
 -#endif // FULL_SYSTEM}
+ 
+     for (uint32_t j = 0; j < numWorkIds; j++)
+         delete workItemStats[j];
  }
  
  void
@@@ -313,12 -348,45 +330,43 @@@ System::serialize(ostream &os
  void
  System::unserialize(Checkpoint *cp, const string &section)
  {
 -#if FULL_SYSTEM
 -    kernelSymtab->unserialize("kernel_symtab", cp, section);
 -#else // !FULL_SYSTEM
 +    if (FullSystem)
 +        kernelSymtab->unserialize("kernel_symtab", cp, section);
      UNSERIALIZE_SCALAR(pagePtr);
      UNSERIALIZE_SCALAR(nextPID);
 -#endif
  }
  
+ void
+ System::regStats()
+ {
+     for (uint32_t j = 0; j < numWorkIds ; j++) {
+         workItemStats[j] = new Stats::Histogram();
+         stringstream namestr;
+         ccprintf(namestr, "work_item_type%d", j);
+         workItemStats[j]->init(20)
+                          .name(name() + "." + namestr.str())
+                          .desc("Run time stat for" + namestr.str())
+                          .prereq(*workItemStats[j]);
+     }
+ }
+ 
+ void
+ System::workItemEnd(uint32_t tid, uint32_t workid)
+ {
+     std::pair<uint32_t,uint32_t> p(tid, workid);
+     if (!lastWorkItemStarted.count(p))
+         return;
+ 
+     Tick samp = curTick() - lastWorkItemStarted[p];
+     DPRINTF(WorkItems, "Work item end: %d\t%d\t%lld\n", tid, workid, samp);
+ 
+     if (workid >= numWorkIds)
+         fatal("Got workid greater than specified in system configuration\n");
+ 
+     workItemStats[workid]->sample(samp);
+     lastWorkItemStarted.erase(p);
+ }
+ 
  void
  System::printSystems()
  {

diff --cc src/sim/system.hh
index 00d8360e0832d3d813b22623bb7ba8cc461e7d6d,44383c399342e6f0f2b6fdf40004e7c742515415..d675eb727c91c2dc56f019b73d422cc42f03cfa5
--- 1/src/sim/system.hh
--- 2/src/sim/system.hh
+++ b/src/sim/system.hh
@@@ -198,6 -214,15 +200,14 @@@ class System : public SimObjec
          return count;
      }
  
 -#if FULL_SYSTEM
+     inline void workItemBegin(uint32_t tid, uint32_t workid)
+     {
+         std::pair<uint32_t,uint32_t> p(tid, workid);
+         lastWorkItemStarted[p] = curTick();
+     }
+ 
+     void workItemEnd(uint32_t tid, uint32_t workid);
+ 
      /**
       * Fix up an address used to match PCs for hooking simulator
       * events on to target function executions.  See comment in