uppercase = false;
base = dec;
format = none;
+ float_format = best;
precision = -1;
width = 0;
get_precision = false;
public:
SimpleFlag(const char *name, const char *desc)
- : Flag(name, desc)
+ : Flag(name, desc), _status(false)
{ }
bool status() const { return _status; }
ElfObject::ElfObject(const string &_filename, int _fd,
size_t _len, uint8_t *_data,
Arch _arch, OpSys _opSys)
- : ObjectFile(_filename, _fd, _len, _data, _arch, _opSys)
+ : ObjectFile(_filename, _fd, _len, _data, _arch, _opSys),
+ _programHeaderTable(0), _programHeaderSize(0), _programHeaderCount(0)
{
Elf *elf;
{
pfd.fd = _fd;
pfd.events = _events;
+ pfd.revents = 0;
}
PollEvent::~PollEvent()
public:
VectorBase()
- : storage(NULL)
+ : storage(nullptr), _size(0)
{}
~VectorBase()
public:
Vector2dBase()
- : storage(NULL)
+ : x(0), y(0), _size(0), storage(nullptr)
{}
~Vector2dBase()
/** The number of buckets.. */
size_type buckets;
- Params() : DistParams(Hist) {}
+ Params() : DistParams(Hist), buckets(0) {}
};
private:
*/
VncServer::VncServer(const Params *p)
: VncInput(p), listenEvent(NULL), dataEvent(NULL), number(p->number),
- dataFd(-1), sendUpdate(false)
+ dataFd(-1), sendUpdate(false),
+ supportsRawEnc(false), supportsResizeEnc(false)
{
if (p->port)
listen(p->port);
simCycles(p->sim_cycles),
fixedPkts(p->fixed_pkts),
maxPackets(p->max_packets),
+ numPacketsSent(0),
trafficType(p->traffic_type),
injRate(p->inj_rate),
precision(p->precision),
startAddr(start_addr), endAddr(end_addr),
blocksize(_blocksize), minPeriod(min_period),
maxPeriod(max_period), readPercent(read_percent),
- dataLimit(data_limit)
+ dataLimit(data_limit), nextAddr(startAddr), dataManipulated(0)
{ }
void enter();
startAddr(start_addr), endAddr(end_addr),
blocksize(_blocksize), minPeriod(min_period),
maxPeriod(max_period), readPercent(read_percent),
- dataLimit(data_limit)
+ dataLimit(data_limit), dataManipulated(0)
{ }
void enter();
unsigned int addr_mapping)
: RandomGen(_name, master_id, _duration, start_addr, end_addr,
_blocksize, min_period, max_period, read_percent, data_limit),
- numSeqPkts(num_seq_pkts), countNumSeqPkts(0),
+ numSeqPkts(num_seq_pkts), countNumSeqPkts(0), addr(0),
isRead(true), pageSize(page_size),
pageBits(floorLog2(page_size / _blocksize)),
bankBits(floorLog2(nbr_of_banks_DRAM)),
elasticReq(p->elastic_req),
nextTransitionTick(0),
nextPacketTick(0),
+ currState(0),
port(name() + ".port", *this),
retryPkt(NULL),
retryPktTick(0),
BaseCache::BaseCache(const Params *p)
: MemObject(p),
+ cpuSidePort(nullptr), memSidePort(nullptr),
mshrQueue("MSHRs", p->mshrs, 4, MSHRQueue_MSHRs),
writeBuffer("write buffer", p->write_buffers, p->mshrs+1000,
MSHRQueue_WriteBuffer),
forwardSnoops(p->forward_snoops),
isTopLevel(p->is_top_level),
blocked(0),
+ order(0),
noTargetMSHR(NULL),
missCount(p->max_miss_count),
addrRanges(p->addr_ranges.begin(), p->addr_ranges.end()),
#include "sim/system.hh"
BasePrefetcher::BasePrefetcher(const Params *p)
- : ClockedObject(p), size(p->size), latency(p->latency), degree(p->degree),
+ : ClockedObject(p), size(p->size), cache(nullptr), blkSize(0),
+ latency(p->latency), degree(p->degree),
useMasterId(p->use_master_id), pageStop(!p->cross_pages),
serialSquash(p->serial_squash), onlyData(p->data_accesses_only),
onMissOnly(p->on_miss_only), onReadOnly(p->on_read_only),
void
BasePrefetcher::setCache(BaseCache *_cache)
{
+ assert(!cache);
cache = _cache;
blkSize = cache->getBlockSize();
}
BaseCache* cache;
/** The block size of the parent cache. */
- int blkSize;
+ unsigned blkSize;
/** The latency before a prefetch is issued */
const Cycles latency;
BaseTags::BaseTags(const Params *p)
: ClockedObject(p), blkSize(p->block_size), size(p->size),
- hitLatency(p->hit_latency)
+ hitLatency(p->hit_latency), cache(nullptr), warmupBound(0),
+ warmedUp(false), numBlocks(0)
{
}
void
BaseTags::setCache(BaseCache *_cache)
{
+ assert(!cache);
cache = _cache;
}
setShift = floorLog2(blkSize);
setMask = numSets - 1;
tagShift = setShift + floorLog2(numSets);
- warmedUp = false;
/** @todo Make warmup percentage a parameter. */
warmupBound = numSets * assoc;
using namespace std;
FALRU::FALRU(const Params *p)
- : BaseTags(p)
+ : BaseTags(p), cacheBoundaries(nullptr)
{
if (!isPowerOf2(blkSize))
fatal("cache block size (in bytes) `%d' must be a power of two",
cacheMask = 0;
}
- warmedUp = false;
warmupBound = size/blkSize;
numBlocks = size/blkSize;
* not be valid. The command must be supplied.
*/
Packet(Request *_req, MemCmd _cmd)
- : cmd(_cmd), req(_req), data(NULL),
+ : cmd(_cmd), req(_req), data(nullptr), addr(0), _isSecure(false),
src(InvalidPortID), dest(InvalidPortID),
bytesValidStart(0), bytesValidEnd(0),
busFirstWordDelay(0), busLastWordDelay(0),
* req. this allows for overriding the size/addr of the req.
*/
Packet(Request *_req, MemCmd _cmd, int _blkSize)
- : cmd(_cmd), req(_req), data(NULL),
+ : cmd(_cmd), req(_req), data(nullptr), addr(0), _isSecure(false),
src(InvalidPortID), dest(InvalidPortID),
bytesValidStart(0), bytesValidEnd(0),
busFirstWordDelay(0), busLastWordDelay(0),
* default constructor.)
*/
Request()
- : _taskId(ContextSwitchTaskId::Unknown),
- translateDelta(0), accessDelta(0), depth(0)
+ : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
+ _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
+ _extraData(0), _contextId(0), _threadId(0), _pc(0),
+ translateDelta(0), accessDelta(0), depth(0)
{}
/**
* These fields are adequate to perform a request.
*/
Request(Addr paddr, int size, Flags flags, MasterID mid)
- : _taskId(ContextSwitchTaskId::Unknown)
+ : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
+ _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
+ _extraData(0), _contextId(0), _threadId(0), _pc(0),
+ translateDelta(0), accessDelta(0), depth(0)
{
setPhys(paddr, size, flags, mid);
}
Request(Addr paddr, int size, Flags flags, MasterID mid, Tick time)
- : _taskId(ContextSwitchTaskId::Unknown)
+ : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
+ _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
+ _extraData(0), _contextId(0), _threadId(0), _pc(0),
+ translateDelta(0), accessDelta(0), depth(0)
{
setPhys(paddr, size, flags, mid, time);
}
Request(Addr paddr, int size, Flags flags, MasterID mid, Tick time, Addr pc)
- : _taskId(ContextSwitchTaskId::Unknown)
+ : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
+ _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
+ _extraData(0), _contextId(0), _threadId(0), _pc(0),
+ translateDelta(0), accessDelta(0), depth(0)
{
setPhys(paddr, size, flags, mid, time);
privateFlags.set(VALID_PC);
Request(int asid, Addr vaddr, int size, Flags flags, MasterID mid, Addr pc,
int cid, ThreadID tid)
- : _taskId(ContextSwitchTaskId::Unknown)
+ : _paddr(0), _size(0), _masterId(invldMasterId), _time(0),
+ _taskId(ContextSwitchTaskId::Unknown), _asid(0), _vaddr(0),
+ _extraData(0), _contextId(0), _threadId(0), _pc(0),
+ translateDelta(0), accessDelta(0), depth(0)
{
setVirt(asid, vaddr, size, flags, mid, pc);
setThreadContext(cid, tid);
* for a future call to change a domain's performance level.
*/
struct UpdateEvent : public Event {
- UpdateEvent() : Event(DVFS_Update_Pri) {}
+ UpdateEvent() : Event(DVFS_Update_Pri), domainIDToSet(0),
+ perfLevelToSet(0) {}
/**
* Static pointer to the single DVFS hander for all the update events
* @param queue that the event gets scheduled on
*/
Event(Priority p = Default_Pri, Flags f = 0)
- : nextBin(NULL), nextInBin(NULL), _priority(p),
+ : nextBin(nullptr), nextInBin(nullptr), _when(0), _priority(p),
flags(Initialized | f)
{
assert(f.noneSet(~PublicWrite));
pagePtr(0),
init_param(p->init_param),
physProxy(_systemPort, p->cache_line_size),
+ kernelSymtab(nullptr),
+ kernel(nullptr),
loadAddrMask(p->load_addr_mask),
loadAddrOffset(p->load_offset),
nextPID(0),
if (params()->kernel == "") {
inform("No kernel set for full system simulation. "
"Assuming you know what you're doing\n");
-
- kernel = NULL;
} else {
// Get the kernel code
kernel = createObjectFile(params()->kernel);