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diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn
index e54dfcf161157e5d60e34f83cef07a8d6ff42081..177e30d91fee98730dd9e5a5f24644645f71bfe3 100644 (file)
--- a/openpower/sv/SimpleV_rationale.mdwn
+++ b/openpower/sv/SimpleV_rationale.mdwn
@@ -12,12 +12,13 @@
 
 Inventing a new Scalar ISA from scratch is over a decade-long task
 including simulators and compilers: OpenRISC 1200 took 12 years to
-mature.  A Vector or Packed SIMD ISA to reach stable general-purpose
+mature.  A Vector or Packed SIMD ISA to reach stable *general-purpose*
 auto-vectorisation compiler support has never been achieved in the
 history of computing, not with the combined resources of ARM, Intel,
 AMD, MIPS, Sun Microsystems, SGI, Cray, and many more.  Rather: GPUs
-have ultra-specialist compilers that are designed from the ground up
-to support Vector/SIMD parallelism, and associated standards managed by
+have ultra-specialist compilers (CUDA) that are designed from the ground up
+to support Vector/SIMD parallelism, and associated standards
+(SPIR-V, Vulkan, OpenCL) managed by
 the Khronos Group, with multi-man-century development committment from
 multiple billion-dollar-revenue companies, to sustain them.