radv/ac/nir: only emit tess factors to storage if tes reads them
authorDave Airlie <airlied@redhat.com>
Sun, 22 Oct 2017 20:23:29 +0000 (06:23 +1000)
committerDave Airlie <airlied@redhat.com>
Sun, 22 Oct 2017 21:10:29 +0000 (07:10 +1000)
Otherwise we just need to write them to the tf ring.

this seems to improve the tessellation demo on Bonarie
~2190->~2230 fps

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
src/amd/common/ac_nir_to_llvm.c
src/amd/common/ac_nir_to_llvm.h
src/amd/vulkan/radv_pipeline.c

index 83b49b535c606d65ce1a714738dc83e47ceb2266..360ca81ca897f6941796e21b6704bbf7cacb6f68 100644 (file)
@@ -6166,8 +6166,8 @@ write_tess_factors(struct nir_to_llvm_context *ctx)
                                            stride - 4, byteoffset, tf_base,
                                            16 + tf_offset, 1, 0, true, false);
 
-       //TODO store to offchip for TES to read - only if TES reads them
-       if (1) {
+       //store to offchip for TES to read - only if TES reads them
+       if (ctx->options->key.tcs.tes_reads_tess_factors) {
                LLVMValueRef inner_vec, outer_vec, tf_outer_offset;
                LLVMValueRef tf_inner_offset;
                unsigned param_outer, param_inner;
index eecc2cb8d493d48a85c1830d3280b768529b9857..9579aeeefef4abab15b05c736d6dee4919f652b9 100644 (file)
@@ -55,6 +55,7 @@ struct ac_tcs_variant_key {
        struct ac_vs_variant_key vs_key;
        unsigned primitive_mode;
        unsigned input_vertices;
+       uint32_t tes_reads_tess_factors:1;
 };
 
 struct ac_fs_variant_key {
index f23afa42b7022ead428b49cc62aefd172293caa5..669d9a4858e9aeb6b21ead099d0cab0f4b29dc0a 100644 (file)
@@ -1773,6 +1773,7 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
                if (keys)
                        keys[MESA_SHADER_TESS_CTRL].tcs.primitive_mode = nir[MESA_SHADER_TESS_EVAL]->info.tess.primitive_mode;
 
+               keys[MESA_SHADER_TESS_CTRL].tcs.tes_reads_tess_factors = !!(nir[MESA_SHADER_TESS_EVAL]->info.inputs_read & (VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER));
                nir_lower_tes_patch_vertices(nir[MESA_SHADER_TESS_EVAL], nir[MESA_SHADER_TESS_CTRL]->info.tess.tcs_vertices_out);
        }