add notes on ls016 twin-butterfly instructions

diff --git a/openpower/sv/rfc/ls016.mdwn b/openpower/sv/rfc/ls016.mdwn
index 83bf4814e75635d601de4902d03cf4a3915d7e3d..e1630f8f5b5d1f62ea79168e95a37666c5778d93 100644 (file)
--- a/openpower/sv/rfc/ls016.mdwn
+++ b/openpower/sv/rfc/ls016.mdwn
@@ -1,4 +1,4 @@
-# RFC ls015 DCT / FFT Twin Butterfly instructions
+# RFC ls016 DCT / FFT Twin Butterfly instructions
 
 **URLs**:
 
@@ -70,7 +70,15 @@ are often loop-unrolled, resulting in L1 I-Cache stripmining.
 
 **Notes and Observations**:
 
-1. TODO
+1. Whilst it is easy to justify these high-value instructions they are
+   sufficiently complex as to warrant placement as optional SFFS in
+   the new EXT2xx area (marked as Vectoriseable).
+2. Although they are 3-in 2-out the actual encoding is as double-overwrite
+   reducing the actual number of operands down to three (RT RA and RB)
+   where RT is a Read-Modify-Write and an additional RS is implicit.
+* Although desirable (particularly to detect overflow) Rc=1 is hard to
+  conceptualise.  It is likely that instead, Simple-V "saturation" if
+  enabled will create an Rc=1 CR.SO flag (including SVP64Single).
 
 **Changes**
 
@@ -99,7 +107,7 @@ Add the following entries to Book I 1.6.1 Word Instruction Formats:
 
 ```
     |0     |6     |11      |16     |21      |26    |31 |
-    | PO   |  RT  |   RA   |   RB  |   SH   |   XO |/  |
+    | PO   |  RT  |   RA   |   RB  |   SH   |   XO |Rc |
 ```
 
 Add the following new fields to Book I 1.6.2 Word Instruction Fields: