Cleanups and improvements in examples/cmos/
authorClifford Wolf <clifford@clifford.at>
Fri, 11 Mar 2016 10:30:01 +0000 (11:30 +0100)
committerClifford Wolf <clifford@clifford.at>
Fri, 11 Mar 2016 10:30:01 +0000 (11:30 +0100)
examples/cmos/.gitignore [new file with mode: 0644]
examples/cmos/README
examples/cmos/counter_tb.gtkw [new file with mode: 0644]
examples/cmos/testbench.sh
examples/cmos/testbench_digital.sh

diff --git a/examples/cmos/.gitignore b/examples/cmos/.gitignore
new file mode 100644 (file)
index 0000000..f58d950
--- /dev/null
@@ -0,0 +1,4 @@
+counter_tb
+counter_tb.vcd
+synth.sp
+synth.v
index a7b777595b659af841d963077f5962e9ea076c93..c459b4b54aba486bdb7acf67729a498f13d93bf9 100644 (file)
@@ -1,7 +1,7 @@
 
-In this directory you will find out, how to generate a spice output
-operating in two modes, analog or event-driven mode supported by ngspice
-xspice sub-module.
+In this directory contains an example for generating a spice output using two
+different spice modes, normal analog transient simulation and event-driven
+digital simulation as supported by ngspice xspice sub-module.
 
 Each test bench can be run separately by either running:
 
@@ -9,4 +9,5 @@ Each test bench can be run separately by either running:
 - testbench_digital.sh for mixed-signal digital simulation.
 
 The later case also includes pure verilog simulation using the iverilog
-and gtkwave to represent the results.
+and gtkwave for comparison.
+
diff --git a/examples/cmos/counter_tb.gtkw b/examples/cmos/counter_tb.gtkw
new file mode 100644 (file)
index 0000000..4a2eac4
--- /dev/null
@@ -0,0 +1,5 @@
+[dumpfile] "counter_tb.vcd"
+counter_tb.clk
+counter_tb.count[2:0]
+counter_tb.en
+counter_tb.reset
index e2a203ff57712835d434e80e75c10d7252d0ff6f..061704b646fe534b1226ed67edd99748ad76f20d 100644 (file)
@@ -5,6 +5,3 @@ set -ex
 ../../yosys counter.ys
 ngspice testbench.sp
 
-# requires ngspice with xspice support enabled:
-#ngspice testbench_digital.sp
-
index 5836c97a6932c1a93a5e63e0166b33cf988e93ab..afaaf4d434462e666a673a0cf3fc7b57361cf708 100644 (file)
@@ -1,15 +1,15 @@
 #!/bin/bash
 
+set -ex
+
 # iverlog simulation
 echo "Doing Verilog simulation with iverilog"
-iverilog -o dsn counter.v counter_tb.v 
-./dsn -lxt2
-gtkwave counter_tb.vcd &
+iverilog -o counter_tb counter.v counter_tb.v 
+./counter_tb; gtkwave counter_tb.gtkw &
 
 # yosys synthesis
-set -ex
-
 ../../yosys counter_digital.ys
 
 # requires ngspice with xspice support enabled:
 ngspice testbench_digital.sp
+