gas/

2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_modrm_byte): Swap REG and NDS for
	FMA.

gas/testsuite/

2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/arch-10.d: Updated.
	* gas/i386/avx.d: Likewise.
	* gas/i386/avx-intel.d: Likewise.
	* gas/i386/x86-64-arch-2.d: Likewise.
	* gas/i386/x86-64-avx.d: Likewise.
	* gas/i386/x86-64-avx-intel.d: Likewise.

opcodes/

2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (OP_VEX_FMA): New.
	(OP_EX_VexImmW): Likewise.
	(VexFMA): Likewise.
	(Vex128FMA): Likewise.
	(EXVexImmW): Likewise.
	(get_vex_imm8): Likewise.
	(OP_EX_VexReg): Likewise.
	(vex_i4_done): Renamed to ...
	(vex_w_done): This.
	(prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
	and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
	FMA instructions.
	(print_insn): Updated.
	(OP_EX_VexW): Rewrite to swap register in VEX with EX.
	(OP_REG_VexI4): Check invalid high registers.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index a86d2df41df1119508b340c688a8d8c17437f90a..40983dc9dcd1bdb52a29873c9f6ddd1791bf95f8 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * config/tc-i386.c (build_modrm_byte): Swap REG and NDS for
+       FMA.
+
 2008-04-16  David S. Miller  <davem@davemloft.net>
 
        * config/tc-sparc.c (sparc_ip): Add support for gotdata mnemonics

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 2a5e79c0e63f9ac45690b18345c4c3490ce95d12..ceabbf71b696a1dc2eb9f2094e1cb838e13c7c9c 100644 (file)
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -5002,7 +5002,7 @@ build_modrm_byte (void)
       nds = dest - 1;
 
       /* There are 2 kinds of instructions:
-           1. 5 operands:  one immediate operand and 4 register
+           1. 5 operands: one immediate operand and 4 register
            operands or 3 register operands plus 1 memory operand.
            It must have VexNDS and VexW0 or VexW1.  The destination
            must be either XMM or YMM register.
@@ -5013,8 +5013,6 @@ build_modrm_byte (void)
            && i.tm.opcode_modifier.vexnds
            && (operand_type_equal (&i.tm.operand_types[dest], &regxmm)
                || operand_type_equal (&i.tm.operand_types[dest], &regymm))
-           && (operand_type_equal (&i.tm.operand_types[nds], &regxmm)
-               || operand_type_equal (&i.tm.operand_types[nds], &regymm))
            && ((dest == 4
                 && i.imm_operands == 1
                 && i.types[0].bitfield.vex_imm4
@@ -5027,8 +5025,6 @@ build_modrm_byte (void)
                    && i.tm.opcode_modifier.veximmext))))
        abort ();
 
-      i.vex.register_specifier = i.op[nds].regs;
-
       if (i.imm_operands == 0)
        {
          /* When there is no immediate operand, generate an 8bit
@@ -5049,6 +5045,16 @@ build_modrm_byte (void)
              source = 1;
              reg = 0;
            }
+
+         /* FMA swaps REG and NDS.  */
+         if (i.tm.cpu_flags.bitfield.cpufma)
+           {
+             unsigned int tmp;
+             tmp = reg;
+             reg = nds;
+             nds = tmp;
+           }
+
          assert (operand_type_equal (&i.tm.operand_types[reg], &regxmm)
                  || operand_type_equal (&i.tm.operand_types[reg],
                                         &regymm));
@@ -5094,6 +5100,15 @@ build_modrm_byte (void)
              i.types[imm].bitfield.imm8 = 1;
            }
 
+         /* FMA swaps REG and NDS.  */
+         if (i.tm.cpu_flags.bitfield.cpufma)
+           {
+             unsigned int tmp;
+             tmp = reg;
+             reg = nds;
+             nds = tmp;
+           }
+
          assert (operand_type_equal (&i.tm.operand_types[reg], &regxmm)
                  || operand_type_equal (&i.tm.operand_types[reg],
                                         &regymm));
@@ -5101,6 +5116,11 @@ build_modrm_byte (void)
            |= ((i.op[reg].regs->reg_num
                 + ((i.op[reg].regs->reg_flags & RegRex) ? 8 : 0)) << 4);
        }
+
+      assert (operand_type_equal (&i.tm.operand_types[nds], &regxmm)
+             || operand_type_equal (&i.tm.operand_types[nds], &regymm));
+      i.vex.register_specifier = i.op[nds].regs;
+
     }
   else
     source = dest = 0;

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 3dcb5ca9cc23d903cb34c2ec20f454cba3dccf71..d8cfbcfb467a8594b14236418ea19c2a6aa954f1 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,8 +1,17 @@
+2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * gas/i386/arch-10.d: Updated.
+       * gas/i386/avx.d: Likewise.
+       * gas/i386/avx-intel.d: Likewise.
+       * gas/i386/x86-64-arch-2.d: Likewise.
+       * gas/i386/x86-64-avx.d: Likewise.
+       * gas/i386/x86-64-avx-intel.d: Likewise.
+
 2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
            Michael Meissner  <michael.meissner@amd.com>
 
-       * gas/i386/x86-64-sse5.s: Add protX tests to allow memory in the middle 
-       operand.
+       * gas/i386/x86-64-sse5.s: Add protX tests to allow memory in the
+       middle operand.
        * gas/i386/x86-64-sse5.d: Likewise.
        
 2008-04-16  David S. Miller  <davem@davemloft.net>

diff --git a/gas/testsuite/gas/i386/arch-10.d b/gas/testsuite/gas/i386/arch-10.d
index 209949c108510e717e02f7c40963c52d878481a7..4a5e0abf0202f22db49e989a5df3616bd426c194 100644 (file)
--- a/gas/testsuite/gas/i386/arch-10.d
+++ b/gas/testsuite/gas/i386/arch-10.d
@@ -21,7 +21,7 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    0f 01 d0                xgetbv 
 [      ]*[a-f0-9]+:    66 0f 38 dc 01          aesenc \(%ecx\),%xmm0
 [      ]*[a-f0-9]+:    66 0f 3a 44 c1 08       pclmulqdq \$0x8,%xmm1,%xmm0
-[      ]*[a-f0-9]+:    c4 e3 ed 69 fc 60       vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 69 fc 20       vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
 [      ]*[a-f0-9]+:    0f 0f dc b7             pmulhrw %mm4,%mm3
 [      ]*[a-f0-9]+:    0f 0f dc bb             pswapd %mm4,%mm3
 [      ]*[a-f0-9]+:    f2 0f 79 ca             insertq %xmm2,%xmm1

diff --git a/gas/testsuite/gas/i386/avx-intel.d b/gas/testsuite/gas/i386/avx-intel.d
index 8d8772ddeaa85e52dbc8b39fc78c53b243fbbe97..831a71d2ce7a0a498aac4c3fbbb8453b32f8562d 100644 (file)
--- a/gas/testsuite/gas/i386/avx-intel.d
+++ b/gas/testsuite/gas/i386/avx-intel.d
@@ -280,30 +280,30 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 6d 4b 39 40       vblendvpd ymm7,ymm2,YMMWORD PTR \[ecx\],ymm4
 [      ]*[a-f0-9]+:    c4 e3 6d 4a fe 40       vblendvps ymm7,ymm2,ymm6,ymm4
 [      ]*[a-f0-9]+:    c4 e3 6d 4a 39 40       vblendvps ymm7,ymm2,YMMWORD PTR \[ecx\],ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 69 fc 60       vfmaddpd ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 69 39 60       vfmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 68 fc 60       vfmaddps ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 68 39 60       vfmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 5d fc 60       vfmaddsubpd ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 5d 39 60       vfmaddsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 5c fc 60       vfmaddsubps ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 5c 39 60       vfmaddsubps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 5f fc 60       vfmsubaddpd ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 5f 39 60       vfmsubaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 5e fc 60       vfmsubaddps ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 5e 39 60       vfmsubaddps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 6d fc 60       vfmsubpd ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 6d 39 60       vfmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 6c fc 60       vfmsubps ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 6c 39 60       vfmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 79 fc 60       vfnmaddpd ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 79 39 60       vfnmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 78 fc 60       vfnmaddps ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 78 39 60       vfnmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 7d fc 60       vfnmsubpd ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 7d 39 60       vfnmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 7c fc 60       vfnmsubps ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 7c 39 60       vfnmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 69 fc 20       vfmaddpd ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 69 39 20       vfmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 68 fc 20       vfmaddps ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 68 39 20       vfmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 5d fc 20       vfmaddsubpd ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 5d 39 20       vfmaddsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 5c fc 20       vfmaddsubps ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 5c 39 20       vfmaddsubps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 5f fc 20       vfmsubaddpd ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 5f 39 20       vfmsubaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 5e fc 20       vfmsubaddps ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 5e 39 20       vfmsubaddps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 6d fc 20       vfmsubpd ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 6d 39 20       vfmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 6c fc 20       vfmsubps ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 6c 39 20       vfmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 79 fc 20       vfnmaddpd ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 79 39 20       vfnmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 78 fc 20       vfnmaddps ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 78 39 20       vfnmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 7d fc 20       vfnmsubpd ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 7d 39 20       vfnmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 7c fc 20       vfnmsubps ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 7c 39 20       vfnmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
 [      ]*[a-f0-9]+:    c4 e3 ed 49 fc 62       vpermilmo2pd ymm7,ymm2,ymm6,ymm4
 [      ]*[a-f0-9]+:    c4 e3 ed 49 39 62       vpermilmo2pd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
 [      ]*[a-f0-9]+:    c4 e3 ed 49 fc 63       vpermilmz2pd ymm7,ymm2,ymm6,ymm4
@@ -806,42 +806,42 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 69 4a 39 40       vblendvps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
 [      ]*[a-f0-9]+:    c4 e3 69 4c fe 40       vpblendvb xmm7,xmm2,xmm6,xmm4
 [      ]*[a-f0-9]+:    c4 e3 69 4c 39 40       vpblendvb xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 69 fc 60       vfmaddpd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 69 39 60       vfmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 69 39 40       vfmaddpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 68 fc 60       vfmaddps xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 68 39 60       vfmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 68 39 40       vfmaddps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5d fc 60       vfmaddsubpd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5d 39 60       vfmaddsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 5d 39 40       vfmaddsubpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5c fc 60       vfmaddsubps xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5c 39 60       vfmaddsubps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 5c 39 40       vfmaddsubps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5f fc 60       vfmsubaddpd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5f 39 60       vfmsubaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 5f 39 40       vfmsubaddpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5e fc 60       vfmsubaddps xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5e 39 60       vfmsubaddps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 5e 39 40       vfmsubaddps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6d fc 60       vfmsubpd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6d 39 60       vfmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 6d 39 40       vfmsubpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6c fc 60       vfmsubps xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6c 39 60       vfmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 6c 39 40       vfmsubps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 79 fc 60       vfnmaddpd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 79 39 60       vfnmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 79 39 40       vfnmaddpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 78 fc 60       vfnmaddps xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 78 39 60       vfnmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 78 39 40       vfnmaddps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7d fc 60       vfnmsubpd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7d 39 60       vfnmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 7d 39 40       vfnmsubpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7c fc 60       vfnmsubps xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7c 39 60       vfnmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 7c 39 40       vfnmsubps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 69 fc 20       vfmaddpd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 69 39 20       vfmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 69 39 20       vfmaddpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 68 fc 20       vfmaddps xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 68 39 20       vfmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 68 39 20       vfmaddps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5d fc 20       vfmaddsubpd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5d 39 20       vfmaddsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 5d 39 20       vfmaddsubpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5c fc 20       vfmaddsubps xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5c 39 20       vfmaddsubps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 5c 39 20       vfmaddsubps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5f fc 20       vfmsubaddpd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5f 39 20       vfmsubaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 5f 39 20       vfmsubaddpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5e fc 20       vfmsubaddps xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5e 39 20       vfmsubaddps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 5e 39 20       vfmsubaddps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6d fc 20       vfmsubpd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6d 39 20       vfmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 6d 39 20       vfmsubpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6c fc 20       vfmsubps xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6c 39 20       vfmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 6c 39 20       vfmsubps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 79 fc 20       vfnmaddpd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 79 39 20       vfnmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 79 39 20       vfnmaddpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 78 fc 20       vfnmaddps xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 78 39 20       vfnmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 78 39 20       vfnmaddps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7d fc 20       vfnmsubpd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7d 39 20       vfnmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 7d 39 20       vfnmsubpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7c fc 20       vfnmsubps xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7c 39 20       vfnmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 7c 39 20       vfnmsubps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
 [      ]*[a-f0-9]+:    c4 e3 e9 49 fc 62       vpermilmo2pd xmm7,xmm2,xmm6,xmm4
 [      ]*[a-f0-9]+:    c4 e3 e9 49 39 62       vpermilmo2pd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
 [      ]*[a-f0-9]+:    c4 e3 69 49 39 42       vpermilmo2pd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
@@ -909,18 +909,18 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c5 cb c2 11 64          vcmpsd xmm2,xmm6,QWORD PTR \[ecx\],0x64
 [      ]*[a-f0-9]+:    c4 e3 49 0b d4 64       vroundsd xmm2,xmm6,xmm4,0x64
 [      ]*[a-f0-9]+:    c4 e3 49 0b 11 64       vroundsd xmm2,xmm6,QWORD PTR \[ecx\],0x64
-[      ]*[a-f0-9]+:    c4 e3 e9 6b fc 60       vfmaddsd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6b 39 60       vfmaddsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 6b 39 40       vfmaddsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6f fc 60       vfmsubsd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6f 39 60       vfmsubsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 6f 39 40       vfmsubsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7b fc 60       vfnmaddsd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7b 39 60       vfnmaddsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 7b 39 40       vfnmaddsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7f fc 60       vfnmsubsd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7f 39 60       vfnmsubsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 7f 39 40       vfnmsubsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6b fc 20       vfmaddsd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6b 39 20       vfmaddsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 6b 39 20       vfmaddsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6f fc 20       vfmsubsd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6f 39 20       vfmsubsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 6f 39 20       vfmsubsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7b fc 20       vfnmaddsd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7b 39 20       vfnmaddsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 7b 39 20       vfnmaddsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7f fc 20       vfnmsubsd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7f 39 20       vfnmsubsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 7f 39 20       vfnmsubsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
 [      ]*[a-f0-9]+:    c5 cb 58 d4             vaddsd xmm2,xmm6,xmm4
 [      ]*[a-f0-9]+:    c5 cb 58 11             vaddsd xmm2,xmm6,QWORD PTR \[ecx\]
 [      ]*[a-f0-9]+:    c5 cb 5a d4             vcvtsd2ss xmm2,xmm6,xmm4
@@ -1124,18 +1124,18 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 49 21 11 64       vinsertps xmm2,xmm6,DWORD PTR \[ecx\],0x64
 [      ]*[a-f0-9]+:    c4 e3 49 0a d4 64       vroundss xmm2,xmm6,xmm4,0x64
 [      ]*[a-f0-9]+:    c4 e3 49 0a 11 64       vroundss xmm2,xmm6,DWORD PTR \[ecx\],0x64
-[      ]*[a-f0-9]+:    c4 e3 e9 6a fc 60       vfmaddss xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6a 39 60       vfmaddss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 6a 39 40       vfmaddss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6e fc 60       vfmsubss xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6e 39 60       vfmsubss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 6e 39 40       vfmsubss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7a fc 60       vfnmaddss xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7a 39 60       vfnmaddss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 7a 39 40       vfnmaddss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7e fc 60       vfnmsubss xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7e 39 60       vfnmsubss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 7e 39 40       vfnmsubss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6a fc 20       vfmaddss xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6a 39 20       vfmaddss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 6a 39 20       vfmaddss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6e fc 20       vfmsubss xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6e 39 20       vfmsubss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 6e 39 20       vfmsubss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7a fc 20       vfnmaddss xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7a 39 20       vfnmaddss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 7a 39 20       vfnmaddss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7e fc 20       vfnmsubss xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7e 39 20       vfnmsubss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 7e 39 20       vfnmsubss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
 [      ]*[a-f0-9]+:    c4 e2 79 22 f4          vpmovsxbq xmm6,xmm4
 [      ]*[a-f0-9]+:    c4 e2 79 22 21          vpmovsxbq xmm4,WORD PTR \[ecx\]
 [      ]*[a-f0-9]+:    c4 e2 79 32 f4          vpmovzxbq xmm6,xmm4
@@ -1663,30 +1663,30 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 6d 4b 39 40       vblendvpd ymm7,ymm2,YMMWORD PTR \[ecx\],ymm4
 [      ]*[a-f0-9]+:    c4 e3 6d 4a fe 40       vblendvps ymm7,ymm2,ymm6,ymm4
 [      ]*[a-f0-9]+:    c4 e3 6d 4a 39 40       vblendvps ymm7,ymm2,YMMWORD PTR \[ecx\],ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 69 fc 60       vfmaddpd ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 69 39 60       vfmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 68 fc 60       vfmaddps ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 68 39 60       vfmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 5d fc 60       vfmaddsubpd ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 5d 39 60       vfmaddsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 5c fc 60       vfmaddsubps ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 5c 39 60       vfmaddsubps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 5f fc 60       vfmsubaddpd ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 5f 39 60       vfmsubaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 5e fc 60       vfmsubaddps ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 5e 39 60       vfmsubaddps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 6d fc 60       vfmsubpd ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 6d 39 60       vfmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 6c fc 60       vfmsubps ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 6c 39 60       vfmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 79 fc 60       vfnmaddpd ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 79 39 60       vfnmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 78 fc 60       vfnmaddps ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 78 39 60       vfnmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 7d fc 60       vfnmsubpd ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 7d 39 60       vfnmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 7c fc 60       vfnmsubps ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 7c 39 60       vfnmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 69 fc 20       vfmaddpd ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 69 39 20       vfmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 68 fc 20       vfmaddps ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 68 39 20       vfmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 5d fc 20       vfmaddsubpd ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 5d 39 20       vfmaddsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 5c fc 20       vfmaddsubps ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 5c 39 20       vfmaddsubps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 5f fc 20       vfmsubaddpd ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 5f 39 20       vfmsubaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 5e fc 20       vfmsubaddps ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 5e 39 20       vfmsubaddps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 6d fc 20       vfmsubpd ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 6d 39 20       vfmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 6c fc 20       vfmsubps ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 6c 39 20       vfmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 79 fc 20       vfnmaddpd ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 79 39 20       vfnmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 78 fc 20       vfnmaddps ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 78 39 20       vfnmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 7d fc 20       vfnmsubpd ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 7d 39 20       vfnmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 7c fc 20       vfnmsubps ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 7c 39 20       vfnmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
 [      ]*[a-f0-9]+:    c4 e3 ed 49 fc 62       vpermilmo2pd ymm7,ymm2,ymm6,ymm4
 [      ]*[a-f0-9]+:    c4 e3 ed 49 39 62       vpermilmo2pd ymm7,ymm2,ymm6,YMMWORD PTR \[ecx\]
 [      ]*[a-f0-9]+:    c4 e3 ed 49 fc 63       vpermilmz2pd ymm7,ymm2,ymm6,ymm4
@@ -2189,42 +2189,42 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 69 4a 39 40       vblendvps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
 [      ]*[a-f0-9]+:    c4 e3 69 4c fe 40       vpblendvb xmm7,xmm2,xmm6,xmm4
 [      ]*[a-f0-9]+:    c4 e3 69 4c 39 40       vpblendvb xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 69 fc 60       vfmaddpd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 69 39 60       vfmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 69 39 40       vfmaddpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 68 fc 60       vfmaddps xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 68 39 60       vfmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 68 39 40       vfmaddps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5d fc 60       vfmaddsubpd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5d 39 60       vfmaddsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 5d 39 40       vfmaddsubpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5c fc 60       vfmaddsubps xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5c 39 60       vfmaddsubps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 5c 39 40       vfmaddsubps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5f fc 60       vfmsubaddpd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5f 39 60       vfmsubaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 5f 39 40       vfmsubaddpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5e fc 60       vfmsubaddps xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5e 39 60       vfmsubaddps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 5e 39 40       vfmsubaddps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6d fc 60       vfmsubpd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6d 39 60       vfmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 6d 39 40       vfmsubpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6c fc 60       vfmsubps xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6c 39 60       vfmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 6c 39 40       vfmsubps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 79 fc 60       vfnmaddpd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 79 39 60       vfnmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 79 39 40       vfnmaddpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 78 fc 60       vfnmaddps xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 78 39 60       vfnmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 78 39 40       vfnmaddps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7d fc 60       vfnmsubpd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7d 39 60       vfnmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 7d 39 40       vfnmsubpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7c fc 60       vfnmsubps xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7c 39 60       vfnmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 7c 39 40       vfnmsubps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 69 fc 20       vfmaddpd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 69 39 20       vfmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 69 39 20       vfmaddpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 68 fc 20       vfmaddps xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 68 39 20       vfmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 68 39 20       vfmaddps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5d fc 20       vfmaddsubpd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5d 39 20       vfmaddsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 5d 39 20       vfmaddsubpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5c fc 20       vfmaddsubps xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5c 39 20       vfmaddsubps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 5c 39 20       vfmaddsubps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5f fc 20       vfmsubaddpd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5f 39 20       vfmsubaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 5f 39 20       vfmsubaddpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5e fc 20       vfmsubaddps xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5e 39 20       vfmsubaddps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 5e 39 20       vfmsubaddps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6d fc 20       vfmsubpd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6d 39 20       vfmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 6d 39 20       vfmsubpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6c fc 20       vfmsubps xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6c 39 20       vfmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 6c 39 20       vfmsubps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 79 fc 20       vfnmaddpd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 79 39 20       vfnmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 79 39 20       vfnmaddpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 78 fc 20       vfnmaddps xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 78 39 20       vfnmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 78 39 20       vfnmaddps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7d fc 20       vfnmsubpd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7d 39 20       vfnmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 7d 39 20       vfnmsubpd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7c fc 20       vfnmsubps xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7c 39 20       vfnmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 7c 39 20       vfnmsubps xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
 [      ]*[a-f0-9]+:    c4 e3 e9 49 fc 62       vpermilmo2pd xmm7,xmm2,xmm6,xmm4
 [      ]*[a-f0-9]+:    c4 e3 e9 49 39 62       vpermilmo2pd xmm7,xmm2,xmm6,XMMWORD PTR \[ecx\]
 [      ]*[a-f0-9]+:    c4 e3 69 49 39 42       vpermilmo2pd xmm7,xmm2,XMMWORD PTR \[ecx\],xmm4
@@ -2292,18 +2292,18 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c5 cb c2 11 64          vcmpsd xmm2,xmm6,QWORD PTR \[ecx\],0x64
 [      ]*[a-f0-9]+:    c4 e3 49 0b d4 64       vroundsd xmm2,xmm6,xmm4,0x64
 [      ]*[a-f0-9]+:    c4 e3 49 0b 11 64       vroundsd xmm2,xmm6,QWORD PTR \[ecx\],0x64
-[      ]*[a-f0-9]+:    c4 e3 e9 6b fc 60       vfmaddsd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6b 39 60       vfmaddsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 6b 39 40       vfmaddsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6f fc 60       vfmsubsd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6f 39 60       vfmsubsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 6f 39 40       vfmsubsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7b fc 60       vfnmaddsd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7b 39 60       vfnmaddsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 7b 39 40       vfnmaddsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7f fc 60       vfnmsubsd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7f 39 60       vfnmsubsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 7f 39 40       vfnmsubsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6b fc 20       vfmaddsd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6b 39 20       vfmaddsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 6b 39 20       vfmaddsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6f fc 20       vfmsubsd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6f 39 20       vfmsubsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 6f 39 20       vfmsubsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7b fc 20       vfnmaddsd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7b 39 20       vfnmaddsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 7b 39 20       vfnmaddsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7f fc 20       vfnmsubsd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7f 39 20       vfnmsubsd xmm7,xmm2,xmm6,QWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 7f 39 20       vfnmsubsd xmm7,xmm2,QWORD PTR \[ecx\],xmm4
 [      ]*[a-f0-9]+:    c5 cb 58 d4             vaddsd xmm2,xmm6,xmm4
 [      ]*[a-f0-9]+:    c5 cb 58 11             vaddsd xmm2,xmm6,QWORD PTR \[ecx\]
 [      ]*[a-f0-9]+:    c5 cb 5a d4             vcvtsd2ss xmm2,xmm6,xmm4
@@ -2507,18 +2507,18 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 49 21 11 64       vinsertps xmm2,xmm6,DWORD PTR \[ecx\],0x64
 [      ]*[a-f0-9]+:    c4 e3 49 0a d4 64       vroundss xmm2,xmm6,xmm4,0x64
 [      ]*[a-f0-9]+:    c4 e3 49 0a 11 64       vroundss xmm2,xmm6,DWORD PTR \[ecx\],0x64
-[      ]*[a-f0-9]+:    c4 e3 e9 6a fc 60       vfmaddss xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6a 39 60       vfmaddss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 6a 39 40       vfmaddss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6e fc 60       vfmsubss xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6e 39 60       vfmsubss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 6e 39 40       vfmsubss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7a fc 60       vfnmaddss xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7a 39 60       vfnmaddss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 7a 39 40       vfnmaddss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7e fc 60       vfnmsubss xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7e 39 60       vfnmsubss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
-[      ]*[a-f0-9]+:    c4 e3 69 7e 39 40       vfnmsubss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6a fc 20       vfmaddss xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6a 39 20       vfmaddss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 6a 39 20       vfmaddss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6e fc 20       vfmsubss xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6e 39 20       vfmsubss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 6e 39 20       vfmsubss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7a fc 20       vfnmaddss xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7a 39 20       vfnmaddss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 7a 39 20       vfnmaddss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7e fc 20       vfnmsubss xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7e 39 20       vfnmsubss xmm7,xmm2,xmm6,DWORD PTR \[ecx\]
+[      ]*[a-f0-9]+:    c4 e3 59 7e 39 20       vfnmsubss xmm7,xmm2,DWORD PTR \[ecx\],xmm4
 [      ]*[a-f0-9]+:    c4 e2 79 22 f4          vpmovsxbq xmm6,xmm4
 [      ]*[a-f0-9]+:    c4 e2 79 22 21          vpmovsxbq xmm4,WORD PTR \[ecx\]
 [      ]*[a-f0-9]+:    c4 e2 79 32 f4          vpmovzxbq xmm6,xmm4

diff --git a/gas/testsuite/gas/i386/avx.d b/gas/testsuite/gas/i386/avx.d
index aa1083f7aadf26a10ba7f6627daaa08700886f91..8d9922b49638fdd14ae50ace593a43b44d82d18d 100644 (file)
--- a/gas/testsuite/gas/i386/avx.d
+++ b/gas/testsuite/gas/i386/avx.d
@@ -279,30 +279,30 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 6d 4b 39 40       vblendvpd %ymm4,\(%ecx\),%ymm2,%ymm7
 [      ]*[a-f0-9]+:    c4 e3 6d 4a fe 40       vblendvps %ymm4,%ymm6,%ymm2,%ymm7
 [      ]*[a-f0-9]+:    c4 e3 6d 4a 39 40       vblendvps %ymm4,\(%ecx\),%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 69 fc 60       vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 69 39 60       vfmaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 68 fc 60       vfmaddps %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 68 39 60       vfmaddps \(%ecx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5d fc 60       vfmaddsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5d 39 60       vfmaddsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5c fc 60       vfmaddsubps %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5c 39 60       vfmaddsubps \(%ecx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5f fc 60       vfmsubaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5f 39 60       vfmsubaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5e fc 60       vfmsubaddps %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5e 39 60       vfmsubaddps \(%ecx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 6d fc 60       vfmsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 6d 39 60       vfmsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 6c fc 60       vfmsubps %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 6c 39 60       vfmsubps \(%ecx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 79 fc 60       vfnmaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 79 39 60       vfnmaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 78 fc 60       vfnmaddps %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 78 39 60       vfnmaddps \(%ecx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 7d fc 60       vfnmsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 7d 39 60       vfnmsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 7c fc 60       vfnmsubps %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 7c 39 60       vfnmsubps \(%ecx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 69 fc 20       vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 69 39 20       vfmaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 68 fc 20       vfmaddps %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 68 39 20       vfmaddps \(%ecx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5d fc 20       vfmaddsubpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5d 39 20       vfmaddsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5c fc 20       vfmaddsubps %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5c 39 20       vfmaddsubps \(%ecx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5f fc 20       vfmsubaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5f 39 20       vfmsubaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5e fc 20       vfmsubaddps %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5e 39 20       vfmsubaddps \(%ecx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 6d fc 20       vfmsubpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 6d 39 20       vfmsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 6c fc 20       vfmsubps %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 6c 39 20       vfmsubps \(%ecx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 79 fc 20       vfnmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 79 39 20       vfnmaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 78 fc 20       vfnmaddps %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 78 39 20       vfnmaddps \(%ecx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 7d fc 20       vfnmsubpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 7d 39 20       vfnmsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 7c fc 20       vfnmsubps %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 7c 39 20       vfnmsubps \(%ecx\),%ymm6,%ymm2,%ymm7
 [      ]*[a-f0-9]+:    c4 e3 ed 49 fc 62       vpermilmo2pd %ymm4,%ymm6,%ymm2,%ymm7
 [      ]*[a-f0-9]+:    c4 e3 ed 49 39 62       vpermilmo2pd \(%ecx\),%ymm6,%ymm2,%ymm7
 [      ]*[a-f0-9]+:    c4 e3 ed 49 fc 63       vpermilmz2pd %ymm4,%ymm6,%ymm2,%ymm7
@@ -805,42 +805,42 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 69 4a 39 40       vblendvps %xmm4,\(%ecx\),%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c4 e3 69 4c fe 40       vpblendvb %xmm4,%xmm6,%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c4 e3 69 4c 39 40       vpblendvb %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 69 fc 60       vfmaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 69 39 60       vfmaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 69 39 40       vfmaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 68 fc 60       vfmaddps %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 68 39 60       vfmaddps \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 68 39 40       vfmaddps %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5d fc 60       vfmaddsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5d 39 60       vfmaddsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 5d 39 40       vfmaddsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5c fc 60       vfmaddsubps %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5c 39 60       vfmaddsubps \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 5c 39 40       vfmaddsubps %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5f fc 60       vfmsubaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5f 39 60       vfmsubaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 5f 39 40       vfmsubaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5e fc 60       vfmsubaddps %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5e 39 60       vfmsubaddps \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 5e 39 40       vfmsubaddps %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6d fc 60       vfmsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6d 39 60       vfmsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 6d 39 40       vfmsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6c fc 60       vfmsubps %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6c 39 60       vfmsubps \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 6c 39 40       vfmsubps %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 79 fc 60       vfnmaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 79 39 60       vfnmaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 79 39 40       vfnmaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 78 fc 60       vfnmaddps %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 78 39 60       vfnmaddps \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 78 39 40       vfnmaddps %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7d fc 60       vfnmsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7d 39 60       vfnmsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 7d 39 40       vfnmsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7c fc 60       vfnmsubps %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7c 39 60       vfnmsubps \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 7c 39 40       vfnmsubps %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 69 fc 20       vfmaddpd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 69 39 20       vfmaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 69 39 20       vfmaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 68 fc 20       vfmaddps %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 68 39 20       vfmaddps \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 68 39 20       vfmaddps %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5d fc 20       vfmaddsubpd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5d 39 20       vfmaddsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 5d 39 20       vfmaddsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5c fc 20       vfmaddsubps %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5c 39 20       vfmaddsubps \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 5c 39 20       vfmaddsubps %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5f fc 20       vfmsubaddpd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5f 39 20       vfmsubaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 5f 39 20       vfmsubaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5e fc 20       vfmsubaddps %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5e 39 20       vfmsubaddps \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 5e 39 20       vfmsubaddps %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6d fc 20       vfmsubpd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6d 39 20       vfmsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 6d 39 20       vfmsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6c fc 20       vfmsubps %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6c 39 20       vfmsubps \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 6c 39 20       vfmsubps %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 79 fc 20       vfnmaddpd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 79 39 20       vfnmaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 79 39 20       vfnmaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 78 fc 20       vfnmaddps %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 78 39 20       vfnmaddps \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 78 39 20       vfnmaddps %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7d fc 20       vfnmsubpd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7d 39 20       vfnmsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 7d 39 20       vfnmsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7c fc 20       vfnmsubps %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7c 39 20       vfnmsubps \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 7c 39 20       vfnmsubps %xmm4,\(%ecx\),%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c4 e3 e9 49 fc 62       vpermilmo2pd %xmm4,%xmm6,%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c4 e3 e9 49 39 62       vpermilmo2pd \(%ecx\),%xmm6,%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c4 e3 69 49 39 42       vpermilmo2pd %xmm4,\(%ecx\),%xmm2,%xmm7
@@ -908,18 +908,18 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c5 cb c2 11 64          vcmpsd \$0x64,\(%ecx\),%xmm6,%xmm2
 [      ]*[a-f0-9]+:    c4 e3 49 0b d4 64       vroundsd \$0x64,%xmm4,%xmm6,%xmm2
 [      ]*[a-f0-9]+:    c4 e3 49 0b 11 64       vroundsd \$0x64,\(%ecx\),%xmm6,%xmm2
-[      ]*[a-f0-9]+:    c4 e3 e9 6b fc 60       vfmaddsd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6b 39 60       vfmaddsd \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 6b 39 40       vfmaddsd %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6f fc 60       vfmsubsd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6f 39 60       vfmsubsd \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 6f 39 40       vfmsubsd %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7b fc 60       vfnmaddsd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7b 39 60       vfnmaddsd \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 7b 39 40       vfnmaddsd %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7f fc 60       vfnmsubsd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7f 39 60       vfnmsubsd \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 7f 39 40       vfnmsubsd %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6b fc 20       vfmaddsd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6b 39 20       vfmaddsd \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 6b 39 20       vfmaddsd %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6f fc 20       vfmsubsd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6f 39 20       vfmsubsd \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 6f 39 20       vfmsubsd %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7b fc 20       vfnmaddsd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7b 39 20       vfnmaddsd \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 7b 39 20       vfnmaddsd %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7f fc 20       vfnmsubsd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7f 39 20       vfnmsubsd \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 7f 39 20       vfnmsubsd %xmm4,\(%ecx\),%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c5 cb 58 d4             vaddsd %xmm4,%xmm6,%xmm2
 [      ]*[a-f0-9]+:    c5 cb 58 11             vaddsd \(%ecx\),%xmm6,%xmm2
 [      ]*[a-f0-9]+:    c5 cb 5a d4             vcvtsd2ss %xmm4,%xmm6,%xmm2
@@ -1123,18 +1123,18 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 49 21 11 64       vinsertps \$0x64,\(%ecx\),%xmm6,%xmm2
 [      ]*[a-f0-9]+:    c4 e3 49 0a d4 64       vroundss \$0x64,%xmm4,%xmm6,%xmm2
 [      ]*[a-f0-9]+:    c4 e3 49 0a 11 64       vroundss \$0x64,\(%ecx\),%xmm6,%xmm2
-[      ]*[a-f0-9]+:    c4 e3 e9 6a fc 60       vfmaddss %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6a 39 60       vfmaddss \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 6a 39 40       vfmaddss %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6e fc 60       vfmsubss %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6e 39 60       vfmsubss \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 6e 39 40       vfmsubss %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7a fc 60       vfnmaddss %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7a 39 60       vfnmaddss \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 7a 39 40       vfnmaddss %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7e fc 60       vfnmsubss %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7e 39 60       vfnmsubss \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 7e 39 40       vfnmsubss %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6a fc 20       vfmaddss %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6a 39 20       vfmaddss \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 6a 39 20       vfmaddss %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6e fc 20       vfmsubss %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6e 39 20       vfmsubss \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 6e 39 20       vfmsubss %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7a fc 20       vfnmaddss %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7a 39 20       vfnmaddss \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 7a 39 20       vfnmaddss %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7e fc 20       vfnmsubss %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7e 39 20       vfnmsubss \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 7e 39 20       vfnmsubss %xmm4,\(%ecx\),%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c4 e2 79 22 f4          vpmovsxbq %xmm4,%xmm6
 [      ]*[a-f0-9]+:    c4 e2 79 22 21          vpmovsxbq \(%ecx\),%xmm4
 [      ]*[a-f0-9]+:    c4 e2 79 32 f4          vpmovzxbq %xmm4,%xmm6
@@ -1662,30 +1662,30 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 6d 4b 39 40       vblendvpd %ymm4,\(%ecx\),%ymm2,%ymm7
 [      ]*[a-f0-9]+:    c4 e3 6d 4a fe 40       vblendvps %ymm4,%ymm6,%ymm2,%ymm7
 [      ]*[a-f0-9]+:    c4 e3 6d 4a 39 40       vblendvps %ymm4,\(%ecx\),%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 69 fc 60       vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 69 39 60       vfmaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 68 fc 60       vfmaddps %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 68 39 60       vfmaddps \(%ecx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5d fc 60       vfmaddsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5d 39 60       vfmaddsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5c fc 60       vfmaddsubps %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5c 39 60       vfmaddsubps \(%ecx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5f fc 60       vfmsubaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5f 39 60       vfmsubaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5e fc 60       vfmsubaddps %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5e 39 60       vfmsubaddps \(%ecx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 6d fc 60       vfmsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 6d 39 60       vfmsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 6c fc 60       vfmsubps %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 6c 39 60       vfmsubps \(%ecx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 79 fc 60       vfnmaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 79 39 60       vfnmaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 78 fc 60       vfnmaddps %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 78 39 60       vfnmaddps \(%ecx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 7d fc 60       vfnmsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 7d 39 60       vfnmsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 7c fc 60       vfnmsubps %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 7c 39 60       vfnmsubps \(%ecx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 69 fc 20       vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 69 39 20       vfmaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 68 fc 20       vfmaddps %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 68 39 20       vfmaddps \(%ecx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5d fc 20       vfmaddsubpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5d 39 20       vfmaddsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5c fc 20       vfmaddsubps %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5c 39 20       vfmaddsubps \(%ecx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5f fc 20       vfmsubaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5f 39 20       vfmsubaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5e fc 20       vfmsubaddps %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5e 39 20       vfmsubaddps \(%ecx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 6d fc 20       vfmsubpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 6d 39 20       vfmsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 6c fc 20       vfmsubps %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 6c 39 20       vfmsubps \(%ecx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 79 fc 20       vfnmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 79 39 20       vfnmaddpd \(%ecx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 78 fc 20       vfnmaddps %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 78 39 20       vfnmaddps \(%ecx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 7d fc 20       vfnmsubpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 7d 39 20       vfnmsubpd \(%ecx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 7c fc 20       vfnmsubps %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 7c 39 20       vfnmsubps \(%ecx\),%ymm6,%ymm2,%ymm7
 [      ]*[a-f0-9]+:    c4 e3 ed 49 fc 62       vpermilmo2pd %ymm4,%ymm6,%ymm2,%ymm7
 [      ]*[a-f0-9]+:    c4 e3 ed 49 39 62       vpermilmo2pd \(%ecx\),%ymm6,%ymm2,%ymm7
 [      ]*[a-f0-9]+:    c4 e3 ed 49 fc 63       vpermilmz2pd %ymm4,%ymm6,%ymm2,%ymm7
@@ -2188,42 +2188,42 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 69 4a 39 40       vblendvps %xmm4,\(%ecx\),%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c4 e3 69 4c fe 40       vpblendvb %xmm4,%xmm6,%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c4 e3 69 4c 39 40       vpblendvb %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 69 fc 60       vfmaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 69 39 60       vfmaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 69 39 40       vfmaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 68 fc 60       vfmaddps %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 68 39 60       vfmaddps \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 68 39 40       vfmaddps %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5d fc 60       vfmaddsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5d 39 60       vfmaddsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 5d 39 40       vfmaddsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5c fc 60       vfmaddsubps %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5c 39 60       vfmaddsubps \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 5c 39 40       vfmaddsubps %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5f fc 60       vfmsubaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5f 39 60       vfmsubaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 5f 39 40       vfmsubaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5e fc 60       vfmsubaddps %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5e 39 60       vfmsubaddps \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 5e 39 40       vfmsubaddps %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6d fc 60       vfmsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6d 39 60       vfmsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 6d 39 40       vfmsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6c fc 60       vfmsubps %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6c 39 60       vfmsubps \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 6c 39 40       vfmsubps %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 79 fc 60       vfnmaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 79 39 60       vfnmaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 79 39 40       vfnmaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 78 fc 60       vfnmaddps %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 78 39 60       vfnmaddps \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 78 39 40       vfnmaddps %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7d fc 60       vfnmsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7d 39 60       vfnmsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 7d 39 40       vfnmsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7c fc 60       vfnmsubps %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7c 39 60       vfnmsubps \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 7c 39 40       vfnmsubps %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 69 fc 20       vfmaddpd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 69 39 20       vfmaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 69 39 20       vfmaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 68 fc 20       vfmaddps %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 68 39 20       vfmaddps \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 68 39 20       vfmaddps %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5d fc 20       vfmaddsubpd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5d 39 20       vfmaddsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 5d 39 20       vfmaddsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5c fc 20       vfmaddsubps %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5c 39 20       vfmaddsubps \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 5c 39 20       vfmaddsubps %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5f fc 20       vfmsubaddpd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5f 39 20       vfmsubaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 5f 39 20       vfmsubaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5e fc 20       vfmsubaddps %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5e 39 20       vfmsubaddps \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 5e 39 20       vfmsubaddps %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6d fc 20       vfmsubpd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6d 39 20       vfmsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 6d 39 20       vfmsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6c fc 20       vfmsubps %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6c 39 20       vfmsubps \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 6c 39 20       vfmsubps %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 79 fc 20       vfnmaddpd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 79 39 20       vfnmaddpd \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 79 39 20       vfnmaddpd %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 78 fc 20       vfnmaddps %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 78 39 20       vfnmaddps \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 78 39 20       vfnmaddps %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7d fc 20       vfnmsubpd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7d 39 20       vfnmsubpd \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 7d 39 20       vfnmsubpd %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7c fc 20       vfnmsubps %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7c 39 20       vfnmsubps \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 7c 39 20       vfnmsubps %xmm4,\(%ecx\),%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c4 e3 e9 49 fc 62       vpermilmo2pd %xmm4,%xmm6,%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c4 e3 e9 49 39 62       vpermilmo2pd \(%ecx\),%xmm6,%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c4 e3 69 49 39 42       vpermilmo2pd %xmm4,\(%ecx\),%xmm2,%xmm7
@@ -2291,18 +2291,18 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c5 cb c2 11 64          vcmpsd \$0x64,\(%ecx\),%xmm6,%xmm2
 [      ]*[a-f0-9]+:    c4 e3 49 0b d4 64       vroundsd \$0x64,%xmm4,%xmm6,%xmm2
 [      ]*[a-f0-9]+:    c4 e3 49 0b 11 64       vroundsd \$0x64,\(%ecx\),%xmm6,%xmm2
-[      ]*[a-f0-9]+:    c4 e3 e9 6b fc 60       vfmaddsd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6b 39 60       vfmaddsd \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 6b 39 40       vfmaddsd %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6f fc 60       vfmsubsd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6f 39 60       vfmsubsd \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 6f 39 40       vfmsubsd %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7b fc 60       vfnmaddsd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7b 39 60       vfnmaddsd \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 7b 39 40       vfnmaddsd %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7f fc 60       vfnmsubsd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7f 39 60       vfnmsubsd \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 7f 39 40       vfnmsubsd %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6b fc 20       vfmaddsd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6b 39 20       vfmaddsd \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 6b 39 20       vfmaddsd %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6f fc 20       vfmsubsd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6f 39 20       vfmsubsd \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 6f 39 20       vfmsubsd %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7b fc 20       vfnmaddsd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7b 39 20       vfnmaddsd \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 7b 39 20       vfnmaddsd %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7f fc 20       vfnmsubsd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7f 39 20       vfnmsubsd \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 7f 39 20       vfnmsubsd %xmm4,\(%ecx\),%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c5 cb 58 d4             vaddsd %xmm4,%xmm6,%xmm2
 [      ]*[a-f0-9]+:    c5 cb 58 11             vaddsd \(%ecx\),%xmm6,%xmm2
 [      ]*[a-f0-9]+:    c5 cb 5a d4             vcvtsd2ss %xmm4,%xmm6,%xmm2
@@ -2506,18 +2506,18 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 49 21 11 64       vinsertps \$0x64,\(%ecx\),%xmm6,%xmm2
 [      ]*[a-f0-9]+:    c4 e3 49 0a d4 64       vroundss \$0x64,%xmm4,%xmm6,%xmm2
 [      ]*[a-f0-9]+:    c4 e3 49 0a 11 64       vroundss \$0x64,\(%ecx\),%xmm6,%xmm2
-[      ]*[a-f0-9]+:    c4 e3 e9 6a fc 60       vfmaddss %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6a 39 60       vfmaddss \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 6a 39 40       vfmaddss %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6e fc 60       vfmsubss %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6e 39 60       vfmsubss \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 6e 39 40       vfmsubss %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7a fc 60       vfnmaddss %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7a 39 60       vfnmaddss \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 7a 39 40       vfnmaddss %xmm4,\(%ecx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7e fc 60       vfnmsubss %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7e 39 60       vfnmsubss \(%ecx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 7e 39 40       vfnmsubss %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6a fc 20       vfmaddss %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6a 39 20       vfmaddss \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 6a 39 20       vfmaddss %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6e fc 20       vfmsubss %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6e 39 20       vfmsubss \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 6e 39 20       vfmsubss %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7a fc 20       vfnmaddss %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7a 39 20       vfnmaddss \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 7a 39 20       vfnmaddss %xmm4,\(%ecx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7e fc 20       vfnmsubss %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7e 39 20       vfnmsubss \(%ecx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 7e 39 20       vfnmsubss %xmm4,\(%ecx\),%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c4 e2 79 22 f4          vpmovsxbq %xmm4,%xmm6
 [      ]*[a-f0-9]+:    c4 e2 79 22 21          vpmovsxbq \(%ecx\),%xmm4
 [      ]*[a-f0-9]+:    c4 e2 79 32 f4          vpmovzxbq %xmm4,%xmm6

diff --git a/gas/testsuite/gas/i386/x86-64-arch-2.d b/gas/testsuite/gas/i386/x86-64-arch-2.d
index eac9dd3620ada91511a041e66ab01e9efb490d2e..bb7a2c9943afbd7a41a07ed4294961833c0771c5 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-arch-2.d
+++ b/gas/testsuite/gas/i386/x86-64-arch-2.d
@@ -21,7 +21,7 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    0f 01 d0                xgetbv 
 [      ]*[a-f0-9]+:    66 0f 38 dc 01          aesenc \(%rcx\),%xmm0
 [      ]*[a-f0-9]+:    66 0f 3a 44 c1 08       pclmulqdq \$0x8,%xmm1,%xmm0
-[      ]*[a-f0-9]+:    c4 e3 ed 69 fc 60       vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 69 fc 20       vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
 [      ]*[a-f0-9]+:    0f 0f dc b7             pmulhrw %mm4,%mm3
 [      ]*[a-f0-9]+:    0f 0f dc bb             pswapd %mm4,%mm3
 [      ]*[a-f0-9]+:    f2 0f 79 ca             insertq %xmm2,%xmm1

diff --git a/gas/testsuite/gas/i386/x86-64-avx-intel.d b/gas/testsuite/gas/i386/x86-64-avx-intel.d
index 8a768971840256620ed71f16796934a458116e3f..4da93d3a538d46c7438e37e9250231388a840d4d 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-avx-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-avx-intel.d
@@ -280,30 +280,30 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 6d 4b 39 40       vblendvpd ymm7,ymm2,YMMWORD PTR \[rcx\],ymm4
 [      ]*[a-f0-9]+:    c4 e3 6d 4a fe 40       vblendvps ymm7,ymm2,ymm6,ymm4
 [      ]*[a-f0-9]+:    c4 e3 6d 4a 39 40       vblendvps ymm7,ymm2,YMMWORD PTR \[rcx\],ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 69 fc 60       vfmaddpd ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 69 39 60       vfmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 68 fc 60       vfmaddps ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 68 39 60       vfmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 5d fc 60       vfmaddsubpd ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 5d 39 60       vfmaddsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 5c fc 60       vfmaddsubps ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 5c 39 60       vfmaddsubps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 5f fc 60       vfmsubaddpd ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 5f 39 60       vfmsubaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 5e fc 60       vfmsubaddps ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 5e 39 60       vfmsubaddps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 6d fc 60       vfmsubpd ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 6d 39 60       vfmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 6c fc 60       vfmsubps ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 6c 39 60       vfmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 79 fc 60       vfnmaddpd ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 79 39 60       vfnmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 78 fc 60       vfnmaddps ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 78 39 60       vfnmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 7d fc 60       vfnmsubpd ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 7d 39 60       vfnmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 7c fc 60       vfnmsubps ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 7c 39 60       vfnmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 69 fc 20       vfmaddpd ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 69 39 20       vfmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 68 fc 20       vfmaddps ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 68 39 20       vfmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 5d fc 20       vfmaddsubpd ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 5d 39 20       vfmaddsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 5c fc 20       vfmaddsubps ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 5c 39 20       vfmaddsubps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 5f fc 20       vfmsubaddpd ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 5f 39 20       vfmsubaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 5e fc 20       vfmsubaddps ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 5e 39 20       vfmsubaddps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 6d fc 20       vfmsubpd ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 6d 39 20       vfmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 6c fc 20       vfmsubps ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 6c 39 20       vfmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 79 fc 20       vfnmaddpd ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 79 39 20       vfnmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 78 fc 20       vfnmaddps ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 78 39 20       vfnmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 7d fc 20       vfnmsubpd ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 7d 39 20       vfnmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 7c fc 20       vfnmsubps ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 7c 39 20       vfnmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
 [      ]*[a-f0-9]+:    c4 e3 ed 49 fc 62       vpermilmo2pd ymm7,ymm2,ymm6,ymm4
 [      ]*[a-f0-9]+:    c4 e3 ed 49 39 62       vpermilmo2pd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
 [      ]*[a-f0-9]+:    c4 e3 ed 49 fc 63       vpermilmz2pd ymm7,ymm2,ymm6,ymm4
@@ -806,42 +806,42 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 69 4a 39 40       vblendvps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
 [      ]*[a-f0-9]+:    c4 e3 69 4c fe 40       vpblendvb xmm7,xmm2,xmm6,xmm4
 [      ]*[a-f0-9]+:    c4 e3 69 4c 39 40       vpblendvb xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 69 fc 60       vfmaddpd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 69 39 60       vfmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 69 39 40       vfmaddpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 68 fc 60       vfmaddps xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 68 39 60       vfmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 68 39 40       vfmaddps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5d fc 60       vfmaddsubpd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5d 39 60       vfmaddsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 5d 39 40       vfmaddsubpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5c fc 60       vfmaddsubps xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5c 39 60       vfmaddsubps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 5c 39 40       vfmaddsubps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5f fc 60       vfmsubaddpd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5f 39 60       vfmsubaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 5f 39 40       vfmsubaddpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5e fc 60       vfmsubaddps xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5e 39 60       vfmsubaddps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 5e 39 40       vfmsubaddps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6d fc 60       vfmsubpd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6d 39 60       vfmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 6d 39 40       vfmsubpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6c fc 60       vfmsubps xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6c 39 60       vfmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 6c 39 40       vfmsubps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 79 fc 60       vfnmaddpd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 79 39 60       vfnmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 79 39 40       vfnmaddpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 78 fc 60       vfnmaddps xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 78 39 60       vfnmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 78 39 40       vfnmaddps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7d fc 60       vfnmsubpd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7d 39 60       vfnmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 7d 39 40       vfnmsubpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7c fc 60       vfnmsubps xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7c 39 60       vfnmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 7c 39 40       vfnmsubps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 69 fc 20       vfmaddpd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 69 39 20       vfmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 69 39 20       vfmaddpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 68 fc 20       vfmaddps xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 68 39 20       vfmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 68 39 20       vfmaddps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5d fc 20       vfmaddsubpd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5d 39 20       vfmaddsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 5d 39 20       vfmaddsubpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5c fc 20       vfmaddsubps xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5c 39 20       vfmaddsubps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 5c 39 20       vfmaddsubps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5f fc 20       vfmsubaddpd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5f 39 20       vfmsubaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 5f 39 20       vfmsubaddpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5e fc 20       vfmsubaddps xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5e 39 20       vfmsubaddps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 5e 39 20       vfmsubaddps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6d fc 20       vfmsubpd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6d 39 20       vfmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 6d 39 20       vfmsubpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6c fc 20       vfmsubps xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6c 39 20       vfmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 6c 39 20       vfmsubps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 79 fc 20       vfnmaddpd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 79 39 20       vfnmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 79 39 20       vfnmaddpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 78 fc 20       vfnmaddps xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 78 39 20       vfnmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 78 39 20       vfnmaddps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7d fc 20       vfnmsubpd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7d 39 20       vfnmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 7d 39 20       vfnmsubpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7c fc 20       vfnmsubps xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7c 39 20       vfnmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 7c 39 20       vfnmsubps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
 [      ]*[a-f0-9]+:    c4 e3 e9 49 fc 62       vpermilmo2pd xmm7,xmm2,xmm6,xmm4
 [      ]*[a-f0-9]+:    c4 e3 e9 49 39 62       vpermilmo2pd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
 [      ]*[a-f0-9]+:    c4 e3 69 49 39 42       vpermilmo2pd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
@@ -923,18 +923,18 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c5 cb c2 11 64          vcmpsd xmm2,xmm6,QWORD PTR \[rcx\],0x64
 [      ]*[a-f0-9]+:    c4 e3 49 0b d4 64       vroundsd xmm2,xmm6,xmm4,0x64
 [      ]*[a-f0-9]+:    c4 e3 49 0b 11 64       vroundsd xmm2,xmm6,QWORD PTR \[rcx\],0x64
-[      ]*[a-f0-9]+:    c4 e3 e9 6b fc 60       vfmaddsd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6b 39 60       vfmaddsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 6b 39 40       vfmaddsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6f fc 60       vfmsubsd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6f 39 60       vfmsubsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 6f 39 40       vfmsubsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7b fc 60       vfnmaddsd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7b 39 60       vfnmaddsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 7b 39 40       vfnmaddsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7f fc 60       vfnmsubsd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7f 39 60       vfnmsubsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 7f 39 40       vfnmsubsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6b fc 20       vfmaddsd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6b 39 20       vfmaddsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 6b 39 20       vfmaddsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6f fc 20       vfmsubsd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6f 39 20       vfmsubsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 6f 39 20       vfmsubsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7b fc 20       vfnmaddsd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7b 39 20       vfnmaddsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 7b 39 20       vfnmaddsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7f fc 20       vfnmsubsd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7f 39 20       vfnmsubsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 7f 39 20       vfnmsubsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
 [      ]*[a-f0-9]+:    c5 cb 58 d4             vaddsd xmm2,xmm6,xmm4
 [      ]*[a-f0-9]+:    c5 cb 58 11             vaddsd xmm2,xmm6,QWORD PTR \[rcx\]
 [      ]*[a-f0-9]+:    c5 cb 5a d4             vcvtsd2ss xmm2,xmm6,xmm4
@@ -1146,18 +1146,18 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 49 21 11 64       vinsertps xmm2,xmm6,DWORD PTR \[rcx\],0x64
 [      ]*[a-f0-9]+:    c4 e3 49 0a d4 64       vroundss xmm2,xmm6,xmm4,0x64
 [      ]*[a-f0-9]+:    c4 e3 49 0a 11 64       vroundss xmm2,xmm6,DWORD PTR \[rcx\],0x64
-[      ]*[a-f0-9]+:    c4 e3 e9 6a fc 60       vfmaddss xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6a 39 60       vfmaddss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 6a 39 40       vfmaddss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6e fc 60       vfmsubss xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6e 39 60       vfmsubss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 6e 39 40       vfmsubss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7a fc 60       vfnmaddss xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7a 39 60       vfnmaddss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 7a 39 40       vfnmaddss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7e fc 60       vfnmsubss xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7e 39 60       vfnmsubss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 7e 39 40       vfnmsubss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6a fc 20       vfmaddss xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6a 39 20       vfmaddss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 6a 39 20       vfmaddss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6e fc 20       vfmsubss xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6e 39 20       vfmsubss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 6e 39 20       vfmsubss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7a fc 20       vfnmaddss xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7a 39 20       vfnmaddss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 7a 39 20       vfnmaddss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7e fc 20       vfnmsubss xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7e 39 20       vfnmsubss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 7e 39 20       vfnmsubss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
 [      ]*[a-f0-9]+:    c4 e2 79 22 f4          vpmovsxbq xmm6,xmm4
 [      ]*[a-f0-9]+:    c4 e2 79 22 21          vpmovsxbq xmm4,WORD PTR \[rcx\]
 [      ]*[a-f0-9]+:    c4 e2 79 32 f4          vpmovzxbq xmm6,xmm4
@@ -1807,30 +1807,30 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 6d 4b 39 40       vblendvpd ymm7,ymm2,YMMWORD PTR \[rcx\],ymm4
 [      ]*[a-f0-9]+:    c4 e3 6d 4a fe 40       vblendvps ymm7,ymm2,ymm6,ymm4
 [      ]*[a-f0-9]+:    c4 e3 6d 4a 39 40       vblendvps ymm7,ymm2,YMMWORD PTR \[rcx\],ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 69 fc 60       vfmaddpd ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 69 39 60       vfmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 68 fc 60       vfmaddps ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 68 39 60       vfmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 5d fc 60       vfmaddsubpd ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 5d 39 60       vfmaddsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 5c fc 60       vfmaddsubps ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 5c 39 60       vfmaddsubps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 5f fc 60       vfmsubaddpd ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 5f 39 60       vfmsubaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 5e fc 60       vfmsubaddps ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 5e 39 60       vfmsubaddps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 6d fc 60       vfmsubpd ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 6d 39 60       vfmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 6c fc 60       vfmsubps ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 6c 39 60       vfmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 79 fc 60       vfnmaddpd ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 79 39 60       vfnmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 78 fc 60       vfnmaddps ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 78 39 60       vfnmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 7d fc 60       vfnmsubpd ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 7d 39 60       vfnmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 ed 7c fc 60       vfnmsubps ymm7,ymm2,ymm6,ymm4
-[      ]*[a-f0-9]+:    c4 e3 ed 7c 39 60       vfnmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 69 fc 20       vfmaddpd ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 69 39 20       vfmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 68 fc 20       vfmaddps ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 68 39 20       vfmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 5d fc 20       vfmaddsubpd ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 5d 39 20       vfmaddsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 5c fc 20       vfmaddsubps ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 5c 39 20       vfmaddsubps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 5f fc 20       vfmsubaddpd ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 5f 39 20       vfmsubaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 5e fc 20       vfmsubaddps ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 5e 39 20       vfmsubaddps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 6d fc 20       vfmsubpd ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 6d 39 20       vfmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 6c fc 20       vfmsubps ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 6c 39 20       vfmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 79 fc 20       vfnmaddpd ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 79 39 20       vfnmaddpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 78 fc 20       vfnmaddps ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 78 39 20       vfnmaddps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 7d fc 20       vfnmsubpd ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 7d 39 20       vfnmsubpd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 cd 7c fc 20       vfnmsubps ymm7,ymm2,ymm6,ymm4
+[      ]*[a-f0-9]+:    c4 e3 cd 7c 39 20       vfnmsubps ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
 [      ]*[a-f0-9]+:    c4 e3 ed 49 fc 62       vpermilmo2pd ymm7,ymm2,ymm6,ymm4
 [      ]*[a-f0-9]+:    c4 e3 ed 49 39 62       vpermilmo2pd ymm7,ymm2,ymm6,YMMWORD PTR \[rcx\]
 [      ]*[a-f0-9]+:    c4 e3 ed 49 fc 63       vpermilmz2pd ymm7,ymm2,ymm6,ymm4
@@ -2333,42 +2333,42 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 69 4a 39 40       vblendvps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
 [      ]*[a-f0-9]+:    c4 e3 69 4c fe 40       vpblendvb xmm7,xmm2,xmm6,xmm4
 [      ]*[a-f0-9]+:    c4 e3 69 4c 39 40       vpblendvb xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 69 fc 60       vfmaddpd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 69 39 60       vfmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 69 39 40       vfmaddpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 68 fc 60       vfmaddps xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 68 39 60       vfmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 68 39 40       vfmaddps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5d fc 60       vfmaddsubpd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5d 39 60       vfmaddsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 5d 39 40       vfmaddsubpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5c fc 60       vfmaddsubps xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5c 39 60       vfmaddsubps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 5c 39 40       vfmaddsubps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5f fc 60       vfmsubaddpd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5f 39 60       vfmsubaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 5f 39 40       vfmsubaddpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5e fc 60       vfmsubaddps xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 5e 39 60       vfmsubaddps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 5e 39 40       vfmsubaddps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6d fc 60       vfmsubpd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6d 39 60       vfmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 6d 39 40       vfmsubpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6c fc 60       vfmsubps xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6c 39 60       vfmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 6c 39 40       vfmsubps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 79 fc 60       vfnmaddpd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 79 39 60       vfnmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 79 39 40       vfnmaddpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 78 fc 60       vfnmaddps xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 78 39 60       vfnmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 78 39 40       vfnmaddps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7d fc 60       vfnmsubpd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7d 39 60       vfnmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 7d 39 40       vfnmsubpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7c fc 60       vfnmsubps xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7c 39 60       vfnmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 7c 39 40       vfnmsubps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 69 fc 20       vfmaddpd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 69 39 20       vfmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 69 39 20       vfmaddpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 68 fc 20       vfmaddps xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 68 39 20       vfmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 68 39 20       vfmaddps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5d fc 20       vfmaddsubpd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5d 39 20       vfmaddsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 5d 39 20       vfmaddsubpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5c fc 20       vfmaddsubps xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5c 39 20       vfmaddsubps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 5c 39 20       vfmaddsubps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5f fc 20       vfmsubaddpd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5f 39 20       vfmsubaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 5f 39 20       vfmsubaddpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5e fc 20       vfmsubaddps xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 5e 39 20       vfmsubaddps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 5e 39 20       vfmsubaddps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6d fc 20       vfmsubpd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6d 39 20       vfmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 6d 39 20       vfmsubpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6c fc 20       vfmsubps xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6c 39 20       vfmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 6c 39 20       vfmsubps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 79 fc 20       vfnmaddpd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 79 39 20       vfnmaddpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 79 39 20       vfnmaddpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 78 fc 20       vfnmaddps xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 78 39 20       vfnmaddps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 78 39 20       vfnmaddps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7d fc 20       vfnmsubpd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7d 39 20       vfnmsubpd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 7d 39 20       vfnmsubpd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7c fc 20       vfnmsubps xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7c 39 20       vfnmsubps xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 7c 39 20       vfnmsubps xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
 [      ]*[a-f0-9]+:    c4 e3 e9 49 fc 62       vpermilmo2pd xmm7,xmm2,xmm6,xmm4
 [      ]*[a-f0-9]+:    c4 e3 e9 49 39 62       vpermilmo2pd xmm7,xmm2,xmm6,XMMWORD PTR \[rcx\]
 [      ]*[a-f0-9]+:    c4 e3 69 49 39 42       vpermilmo2pd xmm7,xmm2,XMMWORD PTR \[rcx\],xmm4
@@ -2450,18 +2450,18 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c5 cb c2 11 64          vcmpsd xmm2,xmm6,QWORD PTR \[rcx\],0x64
 [      ]*[a-f0-9]+:    c4 e3 49 0b d4 64       vroundsd xmm2,xmm6,xmm4,0x64
 [      ]*[a-f0-9]+:    c4 e3 49 0b 11 64       vroundsd xmm2,xmm6,QWORD PTR \[rcx\],0x64
-[      ]*[a-f0-9]+:    c4 e3 e9 6b fc 60       vfmaddsd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6b 39 60       vfmaddsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 6b 39 40       vfmaddsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6f fc 60       vfmsubsd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6f 39 60       vfmsubsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 6f 39 40       vfmsubsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7b fc 60       vfnmaddsd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7b 39 60       vfnmaddsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 7b 39 40       vfnmaddsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7f fc 60       vfnmsubsd xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7f 39 60       vfnmsubsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 7f 39 40       vfnmsubsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6b fc 20       vfmaddsd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6b 39 20       vfmaddsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 6b 39 20       vfmaddsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6f fc 20       vfmsubsd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6f 39 20       vfmsubsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 6f 39 20       vfmsubsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7b fc 20       vfnmaddsd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7b 39 20       vfnmaddsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 7b 39 20       vfnmaddsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7f fc 20       vfnmsubsd xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7f 39 20       vfnmsubsd xmm7,xmm2,xmm6,QWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 7f 39 20       vfnmsubsd xmm7,xmm2,QWORD PTR \[rcx\],xmm4
 [      ]*[a-f0-9]+:    c5 cb 58 d4             vaddsd xmm2,xmm6,xmm4
 [      ]*[a-f0-9]+:    c5 cb 58 11             vaddsd xmm2,xmm6,QWORD PTR \[rcx\]
 [      ]*[a-f0-9]+:    c5 cb 5a d4             vcvtsd2ss xmm2,xmm6,xmm4
@@ -2673,18 +2673,18 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 49 21 11 64       vinsertps xmm2,xmm6,DWORD PTR \[rcx\],0x64
 [      ]*[a-f0-9]+:    c4 e3 49 0a d4 64       vroundss xmm2,xmm6,xmm4,0x64
 [      ]*[a-f0-9]+:    c4 e3 49 0a 11 64       vroundss xmm2,xmm6,DWORD PTR \[rcx\],0x64
-[      ]*[a-f0-9]+:    c4 e3 e9 6a fc 60       vfmaddss xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6a 39 60       vfmaddss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 6a 39 40       vfmaddss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6e fc 60       vfmsubss xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 6e 39 60       vfmsubss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 6e 39 40       vfmsubss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7a fc 60       vfnmaddss xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7a 39 60       vfnmaddss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 7a 39 40       vfnmaddss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7e fc 60       vfnmsubss xmm7,xmm2,xmm6,xmm4
-[      ]*[a-f0-9]+:    c4 e3 e9 7e 39 60       vfnmsubss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
-[      ]*[a-f0-9]+:    c4 e3 69 7e 39 40       vfnmsubss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6a fc 20       vfmaddss xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6a 39 20       vfmaddss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 6a 39 20       vfmaddss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6e fc 20       vfmsubss xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 6e 39 20       vfmsubss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 6e 39 20       vfmsubss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7a fc 20       vfnmaddss xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7a 39 20       vfnmaddss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 7a 39 20       vfnmaddss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7e fc 20       vfnmsubss xmm7,xmm2,xmm6,xmm4
+[      ]*[a-f0-9]+:    c4 e3 c9 7e 39 20       vfnmsubss xmm7,xmm2,xmm6,DWORD PTR \[rcx\]
+[      ]*[a-f0-9]+:    c4 e3 59 7e 39 20       vfnmsubss xmm7,xmm2,DWORD PTR \[rcx\],xmm4
 [      ]*[a-f0-9]+:    c4 e2 79 22 f4          vpmovsxbq xmm6,xmm4
 [      ]*[a-f0-9]+:    c4 e2 79 22 21          vpmovsxbq xmm4,WORD PTR \[rcx\]
 [      ]*[a-f0-9]+:    c4 e2 79 32 f4          vpmovzxbq xmm6,xmm4

diff --git a/gas/testsuite/gas/i386/x86-64-avx.d b/gas/testsuite/gas/i386/x86-64-avx.d
index a3e551a05852c2a8f7c54aaa187537195f0632ad..0be7ec8c2170906ce71f6ebc49e3f1249a2f0b71 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-avx.d
+++ b/gas/testsuite/gas/i386/x86-64-avx.d
@@ -279,30 +279,30 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 6d 4b 39 40       vblendvpd %ymm4,\(%rcx\),%ymm2,%ymm7
 [      ]*[a-f0-9]+:    c4 e3 6d 4a fe 40       vblendvps %ymm4,%ymm6,%ymm2,%ymm7
 [      ]*[a-f0-9]+:    c4 e3 6d 4a 39 40       vblendvps %ymm4,\(%rcx\),%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 69 fc 60       vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 69 39 60       vfmaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 68 fc 60       vfmaddps %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 68 39 60       vfmaddps \(%rcx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5d fc 60       vfmaddsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5d 39 60       vfmaddsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5c fc 60       vfmaddsubps %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5c 39 60       vfmaddsubps \(%rcx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5f fc 60       vfmsubaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5f 39 60       vfmsubaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5e fc 60       vfmsubaddps %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5e 39 60       vfmsubaddps \(%rcx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 6d fc 60       vfmsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 6d 39 60       vfmsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 6c fc 60       vfmsubps %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 6c 39 60       vfmsubps \(%rcx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 79 fc 60       vfnmaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 79 39 60       vfnmaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 78 fc 60       vfnmaddps %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 78 39 60       vfnmaddps \(%rcx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 7d fc 60       vfnmsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 7d 39 60       vfnmsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 7c fc 60       vfnmsubps %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 7c 39 60       vfnmsubps \(%rcx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 69 fc 20       vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 69 39 20       vfmaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 68 fc 20       vfmaddps %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 68 39 20       vfmaddps \(%rcx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5d fc 20       vfmaddsubpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5d 39 20       vfmaddsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5c fc 20       vfmaddsubps %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5c 39 20       vfmaddsubps \(%rcx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5f fc 20       vfmsubaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5f 39 20       vfmsubaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5e fc 20       vfmsubaddps %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5e 39 20       vfmsubaddps \(%rcx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 6d fc 20       vfmsubpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 6d 39 20       vfmsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 6c fc 20       vfmsubps %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 6c 39 20       vfmsubps \(%rcx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 79 fc 20       vfnmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 79 39 20       vfnmaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 78 fc 20       vfnmaddps %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 78 39 20       vfnmaddps \(%rcx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 7d fc 20       vfnmsubpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 7d 39 20       vfnmsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 7c fc 20       vfnmsubps %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 7c 39 20       vfnmsubps \(%rcx\),%ymm6,%ymm2,%ymm7
 [      ]*[a-f0-9]+:    c4 e3 ed 49 fc 62       vpermilmo2pd %ymm4,%ymm6,%ymm2,%ymm7
 [      ]*[a-f0-9]+:    c4 e3 ed 49 39 62       vpermilmo2pd \(%rcx\),%ymm6,%ymm2,%ymm7
 [      ]*[a-f0-9]+:    c4 e3 ed 49 fc 63       vpermilmz2pd %ymm4,%ymm6,%ymm2,%ymm7
@@ -805,42 +805,42 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 69 4a 39 40       vblendvps %xmm4,\(%rcx\),%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c4 e3 69 4c fe 40       vpblendvb %xmm4,%xmm6,%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c4 e3 69 4c 39 40       vpblendvb %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 69 fc 60       vfmaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 69 39 60       vfmaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 69 39 40       vfmaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 68 fc 60       vfmaddps %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 68 39 60       vfmaddps \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 68 39 40       vfmaddps %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5d fc 60       vfmaddsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5d 39 60       vfmaddsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 5d 39 40       vfmaddsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5c fc 60       vfmaddsubps %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5c 39 60       vfmaddsubps \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 5c 39 40       vfmaddsubps %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5f fc 60       vfmsubaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5f 39 60       vfmsubaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 5f 39 40       vfmsubaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5e fc 60       vfmsubaddps %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5e 39 60       vfmsubaddps \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 5e 39 40       vfmsubaddps %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6d fc 60       vfmsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6d 39 60       vfmsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 6d 39 40       vfmsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6c fc 60       vfmsubps %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6c 39 60       vfmsubps \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 6c 39 40       vfmsubps %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 79 fc 60       vfnmaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 79 39 60       vfnmaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 79 39 40       vfnmaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 78 fc 60       vfnmaddps %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 78 39 60       vfnmaddps \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 78 39 40       vfnmaddps %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7d fc 60       vfnmsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7d 39 60       vfnmsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 7d 39 40       vfnmsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7c fc 60       vfnmsubps %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7c 39 60       vfnmsubps \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 7c 39 40       vfnmsubps %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 69 fc 20       vfmaddpd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 69 39 20       vfmaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 69 39 20       vfmaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 68 fc 20       vfmaddps %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 68 39 20       vfmaddps \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 68 39 20       vfmaddps %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5d fc 20       vfmaddsubpd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5d 39 20       vfmaddsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 5d 39 20       vfmaddsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5c fc 20       vfmaddsubps %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5c 39 20       vfmaddsubps \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 5c 39 20       vfmaddsubps %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5f fc 20       vfmsubaddpd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5f 39 20       vfmsubaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 5f 39 20       vfmsubaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5e fc 20       vfmsubaddps %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5e 39 20       vfmsubaddps \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 5e 39 20       vfmsubaddps %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6d fc 20       vfmsubpd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6d 39 20       vfmsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 6d 39 20       vfmsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6c fc 20       vfmsubps %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6c 39 20       vfmsubps \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 6c 39 20       vfmsubps %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 79 fc 20       vfnmaddpd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 79 39 20       vfnmaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 79 39 20       vfnmaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 78 fc 20       vfnmaddps %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 78 39 20       vfnmaddps \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 78 39 20       vfnmaddps %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7d fc 20       vfnmsubpd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7d 39 20       vfnmsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 7d 39 20       vfnmsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7c fc 20       vfnmsubps %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7c 39 20       vfnmsubps \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 7c 39 20       vfnmsubps %xmm4,\(%rcx\),%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c4 e3 e9 49 fc 62       vpermilmo2pd %xmm4,%xmm6,%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c4 e3 e9 49 39 62       vpermilmo2pd \(%rcx\),%xmm6,%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c4 e3 69 49 39 42       vpermilmo2pd %xmm4,\(%rcx\),%xmm2,%xmm7
@@ -922,18 +922,18 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c5 cb c2 11 64          vcmpsd \$0x64,\(%rcx\),%xmm6,%xmm2
 [      ]*[a-f0-9]+:    c4 e3 49 0b d4 64       vroundsd \$0x64,%xmm4,%xmm6,%xmm2
 [      ]*[a-f0-9]+:    c4 e3 49 0b 11 64       vroundsd \$0x64,\(%rcx\),%xmm6,%xmm2
-[      ]*[a-f0-9]+:    c4 e3 e9 6b fc 60       vfmaddsd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6b 39 60       vfmaddsd \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 6b 39 40       vfmaddsd %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6f fc 60       vfmsubsd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6f 39 60       vfmsubsd \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 6f 39 40       vfmsubsd %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7b fc 60       vfnmaddsd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7b 39 60       vfnmaddsd \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 7b 39 40       vfnmaddsd %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7f fc 60       vfnmsubsd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7f 39 60       vfnmsubsd \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 7f 39 40       vfnmsubsd %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6b fc 20       vfmaddsd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6b 39 20       vfmaddsd \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 6b 39 20       vfmaddsd %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6f fc 20       vfmsubsd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6f 39 20       vfmsubsd \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 6f 39 20       vfmsubsd %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7b fc 20       vfnmaddsd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7b 39 20       vfnmaddsd \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 7b 39 20       vfnmaddsd %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7f fc 20       vfnmsubsd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7f 39 20       vfnmsubsd \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 7f 39 20       vfnmsubsd %xmm4,\(%rcx\),%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c5 cb 58 d4             vaddsd %xmm4,%xmm6,%xmm2
 [      ]*[a-f0-9]+:    c5 cb 58 11             vaddsd \(%rcx\),%xmm6,%xmm2
 [      ]*[a-f0-9]+:    c5 cb 5a d4             vcvtsd2ss %xmm4,%xmm6,%xmm2
@@ -1145,18 +1145,18 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 49 21 11 64       vinsertps \$0x64,\(%rcx\),%xmm6,%xmm2
 [      ]*[a-f0-9]+:    c4 e3 49 0a d4 64       vroundss \$0x64,%xmm4,%xmm6,%xmm2
 [      ]*[a-f0-9]+:    c4 e3 49 0a 11 64       vroundss \$0x64,\(%rcx\),%xmm6,%xmm2
-[      ]*[a-f0-9]+:    c4 e3 e9 6a fc 60       vfmaddss %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6a 39 60       vfmaddss \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 6a 39 40       vfmaddss %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6e fc 60       vfmsubss %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6e 39 60       vfmsubss \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 6e 39 40       vfmsubss %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7a fc 60       vfnmaddss %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7a 39 60       vfnmaddss \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 7a 39 40       vfnmaddss %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7e fc 60       vfnmsubss %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7e 39 60       vfnmsubss \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 7e 39 40       vfnmsubss %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6a fc 20       vfmaddss %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6a 39 20       vfmaddss \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 6a 39 20       vfmaddss %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6e fc 20       vfmsubss %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6e 39 20       vfmsubss \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 6e 39 20       vfmsubss %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7a fc 20       vfnmaddss %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7a 39 20       vfnmaddss \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 7a 39 20       vfnmaddss %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7e fc 20       vfnmsubss %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7e 39 20       vfnmsubss \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 7e 39 20       vfnmsubss %xmm4,\(%rcx\),%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c4 e2 79 22 f4          vpmovsxbq %xmm4,%xmm6
 [      ]*[a-f0-9]+:    c4 e2 79 22 21          vpmovsxbq \(%rcx\),%xmm4
 [      ]*[a-f0-9]+:    c4 e2 79 32 f4          vpmovzxbq %xmm4,%xmm6
@@ -1806,30 +1806,30 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 6d 4b 39 40       vblendvpd %ymm4,\(%rcx\),%ymm2,%ymm7
 [      ]*[a-f0-9]+:    c4 e3 6d 4a fe 40       vblendvps %ymm4,%ymm6,%ymm2,%ymm7
 [      ]*[a-f0-9]+:    c4 e3 6d 4a 39 40       vblendvps %ymm4,\(%rcx\),%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 69 fc 60       vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 69 39 60       vfmaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 68 fc 60       vfmaddps %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 68 39 60       vfmaddps \(%rcx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5d fc 60       vfmaddsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5d 39 60       vfmaddsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5c fc 60       vfmaddsubps %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5c 39 60       vfmaddsubps \(%rcx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5f fc 60       vfmsubaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5f 39 60       vfmsubaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5e fc 60       vfmsubaddps %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 5e 39 60       vfmsubaddps \(%rcx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 6d fc 60       vfmsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 6d 39 60       vfmsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 6c fc 60       vfmsubps %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 6c 39 60       vfmsubps \(%rcx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 79 fc 60       vfnmaddpd %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 79 39 60       vfnmaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 78 fc 60       vfnmaddps %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 78 39 60       vfnmaddps \(%rcx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 7d fc 60       vfnmsubpd %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 7d 39 60       vfnmsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 7c fc 60       vfnmsubps %ymm4,%ymm6,%ymm2,%ymm7
-[      ]*[a-f0-9]+:    c4 e3 ed 7c 39 60       vfnmsubps \(%rcx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 69 fc 20       vfmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 69 39 20       vfmaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 68 fc 20       vfmaddps %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 68 39 20       vfmaddps \(%rcx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5d fc 20       vfmaddsubpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5d 39 20       vfmaddsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5c fc 20       vfmaddsubps %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5c 39 20       vfmaddsubps \(%rcx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5f fc 20       vfmsubaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5f 39 20       vfmsubaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5e fc 20       vfmsubaddps %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 5e 39 20       vfmsubaddps \(%rcx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 6d fc 20       vfmsubpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 6d 39 20       vfmsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 6c fc 20       vfmsubps %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 6c 39 20       vfmsubps \(%rcx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 79 fc 20       vfnmaddpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 79 39 20       vfnmaddpd \(%rcx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 78 fc 20       vfnmaddps %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 78 39 20       vfnmaddps \(%rcx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 7d fc 20       vfnmsubpd %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 7d 39 20       vfnmsubpd \(%rcx\),%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 7c fc 20       vfnmsubps %ymm4,%ymm6,%ymm2,%ymm7
+[      ]*[a-f0-9]+:    c4 e3 cd 7c 39 20       vfnmsubps \(%rcx\),%ymm6,%ymm2,%ymm7
 [      ]*[a-f0-9]+:    c4 e3 ed 49 fc 62       vpermilmo2pd %ymm4,%ymm6,%ymm2,%ymm7
 [      ]*[a-f0-9]+:    c4 e3 ed 49 39 62       vpermilmo2pd \(%rcx\),%ymm6,%ymm2,%ymm7
 [      ]*[a-f0-9]+:    c4 e3 ed 49 fc 63       vpermilmz2pd %ymm4,%ymm6,%ymm2,%ymm7
@@ -2332,42 +2332,42 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 69 4a 39 40       vblendvps %xmm4,\(%rcx\),%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c4 e3 69 4c fe 40       vpblendvb %xmm4,%xmm6,%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c4 e3 69 4c 39 40       vpblendvb %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 69 fc 60       vfmaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 69 39 60       vfmaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 69 39 40       vfmaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 68 fc 60       vfmaddps %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 68 39 60       vfmaddps \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 68 39 40       vfmaddps %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5d fc 60       vfmaddsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5d 39 60       vfmaddsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 5d 39 40       vfmaddsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5c fc 60       vfmaddsubps %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5c 39 60       vfmaddsubps \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 5c 39 40       vfmaddsubps %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5f fc 60       vfmsubaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5f 39 60       vfmsubaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 5f 39 40       vfmsubaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5e fc 60       vfmsubaddps %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 5e 39 60       vfmsubaddps \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 5e 39 40       vfmsubaddps %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6d fc 60       vfmsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6d 39 60       vfmsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 6d 39 40       vfmsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6c fc 60       vfmsubps %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6c 39 60       vfmsubps \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 6c 39 40       vfmsubps %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 79 fc 60       vfnmaddpd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 79 39 60       vfnmaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 79 39 40       vfnmaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 78 fc 60       vfnmaddps %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 78 39 60       vfnmaddps \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 78 39 40       vfnmaddps %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7d fc 60       vfnmsubpd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7d 39 60       vfnmsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 7d 39 40       vfnmsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7c fc 60       vfnmsubps %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7c 39 60       vfnmsubps \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 7c 39 40       vfnmsubps %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 69 fc 20       vfmaddpd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 69 39 20       vfmaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 69 39 20       vfmaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 68 fc 20       vfmaddps %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 68 39 20       vfmaddps \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 68 39 20       vfmaddps %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5d fc 20       vfmaddsubpd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5d 39 20       vfmaddsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 5d 39 20       vfmaddsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5c fc 20       vfmaddsubps %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5c 39 20       vfmaddsubps \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 5c 39 20       vfmaddsubps %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5f fc 20       vfmsubaddpd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5f 39 20       vfmsubaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 5f 39 20       vfmsubaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5e fc 20       vfmsubaddps %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 5e 39 20       vfmsubaddps \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 5e 39 20       vfmsubaddps %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6d fc 20       vfmsubpd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6d 39 20       vfmsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 6d 39 20       vfmsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6c fc 20       vfmsubps %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6c 39 20       vfmsubps \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 6c 39 20       vfmsubps %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 79 fc 20       vfnmaddpd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 79 39 20       vfnmaddpd \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 79 39 20       vfnmaddpd %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 78 fc 20       vfnmaddps %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 78 39 20       vfnmaddps \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 78 39 20       vfnmaddps %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7d fc 20       vfnmsubpd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7d 39 20       vfnmsubpd \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 7d 39 20       vfnmsubpd %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7c fc 20       vfnmsubps %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7c 39 20       vfnmsubps \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 7c 39 20       vfnmsubps %xmm4,\(%rcx\),%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c4 e3 e9 49 fc 62       vpermilmo2pd %xmm4,%xmm6,%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c4 e3 e9 49 39 62       vpermilmo2pd \(%rcx\),%xmm6,%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c4 e3 69 49 39 42       vpermilmo2pd %xmm4,\(%rcx\),%xmm2,%xmm7
@@ -2449,18 +2449,18 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c5 cb c2 11 64          vcmpsd \$0x64,\(%rcx\),%xmm6,%xmm2
 [      ]*[a-f0-9]+:    c4 e3 49 0b d4 64       vroundsd \$0x64,%xmm4,%xmm6,%xmm2
 [      ]*[a-f0-9]+:    c4 e3 49 0b 11 64       vroundsd \$0x64,\(%rcx\),%xmm6,%xmm2
-[      ]*[a-f0-9]+:    c4 e3 e9 6b fc 60       vfmaddsd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6b 39 60       vfmaddsd \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 6b 39 40       vfmaddsd %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6f fc 60       vfmsubsd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6f 39 60       vfmsubsd \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 6f 39 40       vfmsubsd %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7b fc 60       vfnmaddsd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7b 39 60       vfnmaddsd \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 7b 39 40       vfnmaddsd %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7f fc 60       vfnmsubsd %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7f 39 60       vfnmsubsd \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 7f 39 40       vfnmsubsd %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6b fc 20       vfmaddsd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6b 39 20       vfmaddsd \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 6b 39 20       vfmaddsd %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6f fc 20       vfmsubsd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6f 39 20       vfmsubsd \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 6f 39 20       vfmsubsd %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7b fc 20       vfnmaddsd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7b 39 20       vfnmaddsd \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 7b 39 20       vfnmaddsd %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7f fc 20       vfnmsubsd %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7f 39 20       vfnmsubsd \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 7f 39 20       vfnmsubsd %xmm4,\(%rcx\),%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c5 cb 58 d4             vaddsd %xmm4,%xmm6,%xmm2
 [      ]*[a-f0-9]+:    c5 cb 58 11             vaddsd \(%rcx\),%xmm6,%xmm2
 [      ]*[a-f0-9]+:    c5 cb 5a d4             vcvtsd2ss %xmm4,%xmm6,%xmm2
@@ -2672,18 +2672,18 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    c4 e3 49 21 11 64       vinsertps \$0x64,\(%rcx\),%xmm6,%xmm2
 [      ]*[a-f0-9]+:    c4 e3 49 0a d4 64       vroundss \$0x64,%xmm4,%xmm6,%xmm2
 [      ]*[a-f0-9]+:    c4 e3 49 0a 11 64       vroundss \$0x64,\(%rcx\),%xmm6,%xmm2
-[      ]*[a-f0-9]+:    c4 e3 e9 6a fc 60       vfmaddss %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6a 39 60       vfmaddss \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 6a 39 40       vfmaddss %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6e fc 60       vfmsubss %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 6e 39 60       vfmsubss \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 6e 39 40       vfmsubss %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7a fc 60       vfnmaddss %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7a 39 60       vfnmaddss \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 7a 39 40       vfnmaddss %xmm4,\(%rcx\),%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7e fc 60       vfnmsubss %xmm4,%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 e9 7e 39 60       vfnmsubss \(%rcx\),%xmm6,%xmm2,%xmm7
-[      ]*[a-f0-9]+:    c4 e3 69 7e 39 40       vfnmsubss %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6a fc 20       vfmaddss %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6a 39 20       vfmaddss \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 6a 39 20       vfmaddss %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6e fc 20       vfmsubss %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 6e 39 20       vfmsubss \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 6e 39 20       vfmsubss %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7a fc 20       vfnmaddss %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7a 39 20       vfnmaddss \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 7a 39 20       vfnmaddss %xmm4,\(%rcx\),%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7e fc 20       vfnmsubss %xmm4,%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 c9 7e 39 20       vfnmsubss \(%rcx\),%xmm6,%xmm2,%xmm7
+[      ]*[a-f0-9]+:    c4 e3 59 7e 39 20       vfnmsubss %xmm4,\(%rcx\),%xmm2,%xmm7
 [      ]*[a-f0-9]+:    c4 e2 79 22 f4          vpmovsxbq %xmm4,%xmm6
 [      ]*[a-f0-9]+:    c4 e2 79 22 21          vpmovsxbq \(%rcx\),%xmm4
 [      ]*[a-f0-9]+:    c4 e2 79 32 f4          vpmovzxbq %xmm4,%xmm6

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 7187955019ea0b4ccaf60b0579a104fac4e0ba80..77dbcfa2f35e5dba3ed2b7fa344bf7f0d4ccda23 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,21 @@
+2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * i386-dis.c (OP_VEX_FMA): New.
+       (OP_EX_VexImmW): Likewise.
+       (VexFMA): Likewise.
+       (Vex128FMA): Likewise.
+       (EXVexImmW): Likewise.
+       (get_vex_imm8): Likewise.
+       (OP_EX_VexReg): Likewise.
+       (vex_i4_done): Renamed to ...
+       (vex_w_done): This.
+       (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
+       and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
+       FMA instructions.
+       (print_insn): Updated.
+       (OP_EX_VexW): Rewrite to swap register in VEX with EX.
+       (OP_REG_VexI4): Check invalid high registers.
+
 2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
            Michael Meissner  <michael.meissner@amd.com>
 

diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index a9b10278da49ba3a7549dd546ae4e33e18b41df0..087c449f4808e15a3a97f53b89be60ed25a657c3 100644 (file)
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -92,8 +92,10 @@ static void OP_MS (int, int);
 static void OP_XS (int, int);
 static void OP_M (int, int);
 static void OP_VEX (int, int);
+static void OP_VEX_FMA (int, int);
 static void OP_EX_Vex (int, int);
 static void OP_EX_VexW (int, int);
+static void OP_EX_VexImmW (int, int);
 static void OP_XMM_Vex (int, int);
 static void OP_XMM_VexW (int, int);
 static void OP_REG_VexI4 (int, int);
@@ -371,11 +373,14 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
 #define Vex128 { OP_VEX, vex128_mode }
 #define Vex256 { OP_VEX, vex256_mode }
 #define VexI4 { VEXI4_Fixup, 0}
+#define VexFMA { OP_VEX_FMA, vex_mode }
+#define Vex128FMA { OP_VEX_FMA, vex128_mode }
 #define EXdVex { OP_EX_Vex, d_mode }
 #define EXqVex { OP_EX_Vex, q_mode }
 #define EXVexW { OP_EX_VexW, x_mode }
 #define EXdVexW { OP_EX_VexW, d_mode }
 #define EXqVexW { OP_EX_VexW, q_mode }
+#define EXVexImmW { OP_EX_VexImmW, x_mode }
 #define XMVex { OP_XMM_Vex, 0 }
 #define XMVexW { OP_XMM_VexW, 0 }
 #define XMVexI4 { OP_REG_VexI4, x_mode }
@@ -1937,7 +1942,7 @@ static struct
 vex;
 static unsigned char need_vex;
 static unsigned char need_vex_reg;
-static unsigned char vex_i4_done;
+static unsigned char vex_w_done;
 
 /* If we are accessing mod/rm/reg without need_modrm set, then the
    values are stale.  Hitting this abort likely indicates that you
@@ -4698,7 +4703,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)", { XX } },
     { "(bad)", { XX } },
-    { "vpermil2ps", { XMVexW, Vex, EXVexW, EXVexW, VPERMIL2 } },
+    { "vpermil2ps", { XMVexW, Vex, EXVexImmW, EXVexImmW, VPERMIL2 } },
     { "(bad)", { XX } },
   },
 
@@ -4706,7 +4711,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)", { XX } },
     { "(bad)", { XX } },
-    { "vpermil2pd", { XMVexW, Vex, EXVexW, EXVexW, VPERMIL2 } },
+    { "vpermil2pd", { XMVexW, Vex, EXVexImmW, EXVexImmW, VPERMIL2 } },
     { "(bad)", { XX } },
   },
 
@@ -4738,7 +4743,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)", { XX } },
     { "(bad)", { XX } },
-    { "vfmaddsubps", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } },
+    { "vfmaddsubps", { XMVexW, VexFMA, EXVexW, EXVexW, VexI4 } },
     { "(bad)", { XX } },
   },
 
@@ -4746,7 +4751,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)", { XX } },
     { "(bad)", { XX } },
-    { "vfmaddsubpd", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } },
+    { "vfmaddsubpd", { XMVexW, VexFMA, EXVexW, EXVexW, VexI4 } },
     { "(bad)", { XX } },
   },
 
@@ -4754,7 +4759,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)", { XX } },
     { "(bad)", { XX } },
-    { "vfmsubaddps", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } },
+    { "vfmsubaddps", { XMVexW, VexFMA, EXVexW, EXVexW, VexI4 } },
     { "(bad)", { XX } },
   },
 
@@ -4762,7 +4767,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)", { XX } },
     { "(bad)", { XX } },
-    { "vfmsubaddpd", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } },
+    { "vfmsubaddpd", { XMVexW, VexFMA, EXVexW, EXVexW, VexI4 } },
     { "(bad)", { XX } },
   },
 
@@ -4802,7 +4807,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)", { XX } },
     { "(bad)", { XX } },
-    { "vfmaddps", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } },
+    { "vfmaddps", { XMVexW, VexFMA, EXVexW, EXVexW, VexI4 } },
     { "(bad)", { XX } },
   },
 
@@ -4810,7 +4815,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)", { XX } },
     { "(bad)", { XX } },
-    { "vfmaddpd", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } },
+    { "vfmaddpd", { XMVexW, VexFMA, EXVexW, EXVexW, VexI4 } },
     { "(bad)", { XX } },
   },
 
@@ -4834,7 +4839,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)", { XX } },
     { "(bad)", { XX } },
-    { "vfmsubps", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } },
+    { "vfmsubps", { XMVexW, VexFMA, EXVexW, EXVexW, VexI4 } },
     { "(bad)", { XX } },
   },
 
@@ -4842,7 +4847,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)", { XX } },
     { "(bad)", { XX } },
-    { "vfmsubpd", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } },
+    { "vfmsubpd", { XMVexW, VexFMA, EXVexW, EXVexW, VexI4 } },
     { "(bad)", { XX } },
   },
 
@@ -4866,7 +4871,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)", { XX } },
     { "(bad)", { XX } },
-    { "vfnmaddps", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } },
+    { "vfnmaddps", { XMVexW, VexFMA, EXVexW, EXVexW, VexI4 } },
     { "(bad)", { XX } },
   },
 
@@ -4874,7 +4879,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)", { XX } },
     { "(bad)", { XX } },
-    { "vfnmaddpd", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } },
+    { "vfnmaddpd", { XMVexW, VexFMA, EXVexW, EXVexW, VexI4 } },
     { "(bad)", { XX } },
   },
 
@@ -4898,7 +4903,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)", { XX } },
     { "(bad)", { XX } },
-    { "vfnmsubps", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } },
+    { "vfnmsubps", { XMVexW, VexFMA, EXVexW, EXVexW, VexI4 } },
     { "(bad)", { XX } },
   },
 
@@ -4906,7 +4911,7 @@ static const struct dis386 prefix_table[][4] = {
   {
     { "(bad)", { XX } },
     { "(bad)", { XX } },
-    { "vfnmsubpd", { XMVexW, Vex, EXVexW, EXVexW, VexI4 } },
+    { "vfnmsubpd", { XMVexW, VexFMA, EXVexW, EXVexW, VexI4 } },
     { "(bad)", { XX } },
   },
 
@@ -8859,49 +8864,49 @@ static const struct dis386 vex_len_table[][2] = {
 
   /* VEX_LEN_3A6A_P_2 */
   {
-    { "vfmaddss",      { XMVexW, Vex128, EXdVexW, EXdVexW, VexI4 } },
+    { "vfmaddss",      { XMVexW, Vex128FMA, EXdVexW, EXdVexW, VexI4 } },
     { "(bad)",         { XX } },
   },
 
   /* VEX_LEN_3A6B_P_2 */
   {
-    { "vfmaddsd",      { XMVexW, Vex128, EXqVexW, EXqVexW, VexI4 } },
+    { "vfmaddsd",      { XMVexW, Vex128FMA, EXqVexW, EXqVexW, VexI4 } },
     { "(bad)",         { XX } },
   },
 
   /* VEX_LEN_3A6E_P_2 */
   {
-    { "vfmsubss",      { XMVexW, Vex128, EXdVexW, EXdVexW, VexI4 } },
+    { "vfmsubss",      { XMVexW, Vex128FMA, EXdVexW, EXdVexW, VexI4 } },
     { "(bad)",         { XX } },
   },
 
   /* VEX_LEN_3A6F_P_2 */
   {
-    { "vfmsubsd",      { XMVexW, Vex128, EXqVexW, EXqVexW, VexI4 } },
+    { "vfmsubsd",      { XMVexW, Vex128FMA, EXqVexW, EXqVexW, VexI4 } },
     { "(bad)",         { XX } },
   },
 
   /* VEX_LEN_3A7A_P_2 */
   {
-    { "vfnmaddss",     { XMVexW, Vex128, EXdVexW, EXdVexW, VexI4 } },
+    { "vfnmaddss",     { XMVexW, Vex128FMA, EXdVexW, EXdVexW, VexI4 } },
     { "(bad)",         { XX } },
   },
 
   /* VEX_LEN_3A7B_P_2 */
   {
-    { "vfnmaddsd",     { XMVexW, Vex128, EXqVexW, EXqVexW, VexI4 } },
+    { "vfnmaddsd",     { XMVexW, Vex128FMA, EXqVexW, EXqVexW, VexI4 } },
     { "(bad)",         { XX } },
   },
 
   /* VEX_LEN_3A7E_P_2 */
   {
-    { "vfnmsubss",     { XMVexW, Vex128, EXdVexW, EXdVexW, VexI4 } },
+    { "vfnmsubss",     { XMVexW, Vex128FMA, EXdVexW, EXdVexW, VexI4 } },
     { "(bad)",         { XX } },
   },
 
   /* VEX_LEN_3A7F_P_2 */
   {
-    { "vfnmsubsd",     { XMVexW, Vex128, EXqVexW, EXqVexW, VexI4 } },
+    { "vfnmsubsd",     { XMVexW, Vex128FMA, EXqVexW, EXqVexW, VexI4 } },
     { "(bad)",         { XX } },
   },
 };
@@ -10184,7 +10189,7 @@ print_insn (bfd_vma pc, disassemble_info *info)
     {
       need_vex = 0;
       need_vex_reg = 0;
-      vex_i4_done = 0;
+      vex_w_done = 0;
       dp = get_valid_dis386 (dp, info);
       if (dp != NULL && putop (dp->name, sizeflag) == 0)
         {
@@ -13276,88 +13281,79 @@ OP_VEX (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
   oappend (scratchbuf + intel_syntax);
 }
 
-static void
-OP_EX_VexW (int bytemode, int sizeflag)
-{
-  int reg = -1;
-  static unsigned char vex_i4;
+/* Get the VEX immediate byte without moving codep.  */
 
-  if (!vex_i4_done)
-    {
-      int bytes_before_imm = 0;
+static unsigned char
+get_vex_imm8 (int sizeflag)
+{
+  int bytes_before_imm = 0;
 
-      /* Skip mod/rm byte once. We will be called twice. */
-      MODRM_CHECK;
-      codep++;
+  /* Skip mod/rm byte.   */
+  MODRM_CHECK;
+  codep++;
 
-      if (modrm.mod != 3)
+  if (modrm.mod != 3)
+    {
+      /* There are SIB/displacement bytes.  */
+      if ((sizeflag & AFLAG) || address_mode == mode_64bit)
        {
-         /* There are SIB/displacement bytes.  */
-         if ((sizeflag & AFLAG) || address_mode == mode_64bit)
-           {
-             /* 32/64 bit address mode */
-             int base = modrm.rm;
+         /* 32/64 bit address mode */
+         int base = modrm.rm;
 
-             /* Check SIB byte.  */
-             if (base == 4)
-               {
-                 FETCH_DATA (the_info, codep + 1);
-                 base = *codep & 7;
-                 bytes_before_imm++;
-               }
+         /* Check SIB byte.  */
+         if (base == 4)
+           {
+             FETCH_DATA (the_info, codep + 1);
+             base = *codep & 7;
+             bytes_before_imm++;
+           }
 
-             switch (modrm.mod)
-               {
-               case 0:
-                 /* When modrm.rm == 5 or modrm.rm == 4 and base in
-                    SIB == 5, there is a 4 byte displacement.  */
-                 if (base != 5)
-                   /* No displacement. */
-                   break;
-               case 2:
-                 /* 4 byte displacement.  */
-                 bytes_before_imm += 4;
-                 break;
-               case 1:
-                 /* 1 byte displacement.  */
-                 bytes_before_imm++;
-                 break;
-               }
+         switch (modrm.mod)
+           {
+           case 0:
+             /* When modrm.rm == 5 or modrm.rm == 4 and base in
+                SIB == 5, there is a 4 byte displacement.  */
+             if (base != 5)
+               /* No displacement. */
+               break;
+           case 2:
+             /* 4 byte displacement.  */
+             bytes_before_imm += 4;
+             break;
+           case 1:
+             /* 1 byte displacement.  */
+             bytes_before_imm++;
+             break;
            }
-         else
-           { /* 16 bit address mode */
-             switch (modrm.mod)
-               {
-               case 0:
-                 /* When modrm.rm == 6, there is a 2 byte
-                    displacement.  */
-                 if (modrm.rm != 6)
-                   /* No displacement. */
-                   break;
-               case 2:
-                 /* 2 byte displacement.  */
-                 bytes_before_imm += 2;
-                 break;
-               case 1:
-                 /* 1 byte displacement.  */
-                 bytes_before_imm++;
-                 break;
-               }
+       }
+      else
+       { /* 16 bit address mode */
+         switch (modrm.mod)
+           {
+           case 0:
+             /* When modrm.rm == 6, there is a 2 byte displacement.  */
+             if (modrm.rm != 6)
+               /* No displacement. */
+               break;
+           case 2:
+             /* 2 byte displacement.  */
+             bytes_before_imm += 2;
+             break;
+           case 1:
+             /* 1 byte displacement.  */
+             bytes_before_imm++;
+             break;
            }
        }
-
-      FETCH_DATA (the_info, codep + bytes_before_imm + 1);
-      vex_i4 = codep [bytes_before_imm];
-      vex_i4_done = 1;
-      if (vex.w)
-       reg = vex_i4 >> 4;
-    }
-  else
-    {
-      if (!vex.w)
-       reg = vex_i4 >> 4;
     }
 
+  FETCH_DATA (the_info, codep + bytes_before_imm + 1);
+  return codep [bytes_before_imm];
+}
+
+static void
+OP_EX_VexReg (int bytemode, int sizeflag, int reg)
+{
   if (reg == -1 && modrm.mod != 3)
     {
       OP_E_memory (bytemode, sizeflag, 0);
@@ -13390,6 +13386,89 @@ OP_EX_VexW (int bytemode, int sizeflag)
   oappend (scratchbuf + intel_syntax);
 }
 
+static void
+OP_EX_VexImmW (int bytemode, int sizeflag)
+{
+  int reg = -1;
+  static unsigned char vex_imm8;
+
+  if (!vex_w_done)
+    {
+      vex_imm8 = get_vex_imm8 (sizeflag);
+      if (vex.w)
+       reg = vex_imm8 >> 4;
+      vex_w_done = 1;
+    }
+  else
+    {
+      if (!vex.w)
+       reg = vex_imm8 >> 4;
+    }
+
+  OP_EX_VexReg (bytemode, sizeflag, reg);
+}
+
+static void
+OP_EX_VexW (int bytemode, int sizeflag)
+{
+  int reg = -1;
+
+  if (!vex_w_done)
+    {
+      vex_w_done = 1;
+      if (vex.w)
+       reg = vex.register_specifier;
+    }
+  else
+    {
+      if (!vex.w)
+       reg = vex.register_specifier;
+    }
+
+  OP_EX_VexReg (bytemode, sizeflag, reg);
+}
+
+static void
+OP_VEX_FMA (int bytemode, int sizeflag)
+{
+  int reg = get_vex_imm8 (sizeflag) >> 4;
+
+  if (reg > 7 && address_mode != mode_64bit)
+    BadOp ();
+
+  switch (vex.length)
+    {
+    case 128:
+      switch (bytemode)
+       {
+       case vex_mode:
+       case vex128_mode:
+         break;
+       default:
+         abort ();
+         return;
+       }
+
+      sprintf (scratchbuf, "%%xmm%d", reg);
+      break;
+    case 256:
+      switch (bytemode)
+       {
+       case vex_mode:
+         break;
+       default:
+         abort ();
+         return;
+       }
+
+      sprintf (scratchbuf, "%%ymm%d", reg);
+      break;
+    default:
+      abort ();
+    }
+  oappend (scratchbuf + intel_syntax);
+}
+
 static void
 VEXI4_Fixup (int bytemode ATTRIBUTE_UNUSED,
             int sizeflag ATTRIBUTE_UNUSED)
@@ -13414,6 +13493,9 @@ OP_REG_VexI4 (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
       BadOp ();
 
   reg >>= 4;
+  if (reg > 7 && address_mode != mode_64bit)
+    BadOp ();
+
   switch (vex.length)
     {
     case 128: