Re: [libre-riscv-dev] LibreSOC - RISCV and POWER dual architecture feasibility
authorJacob Lifshay <programmerjake@gmail.com>
Sun, 15 Mar 2020 06:13:23 +0000 (23:13 -0700)
committerlibre-riscv-dev <libre-riscv-dev@lists.libre-riscv.org>
Sun, 15 Mar 2020 06:13:37 +0000 (06:13 +0000)
90/860b3bb72db5c120c33476c7497182beac2e44 [new file with mode: 0644]

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+In-Reply-To: <20200315051018.svaw4aor7ifwn725@topoi.pooq.com>
+From: Jacob Lifshay <programmerjake@gmail.com>
+Date: Sat, 14 Mar 2020 23:13:23 -0700
+Message-ID: <CAC2bXD7h90TXSCeFAM41NW-VbTizpWVueDu8KrmLHxBaX-7a=A@mail.gmail.com>
+To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
+X-Content-Filtered-By: Mailman/MimeDel 2.1.23
+Subject: Re: [libre-riscv-dev] LibreSOC - RISCV and POWER dual architecture
+ feasibility
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