test: ice40_dsp test to read +/ice40/cells_sim.v for default params

diff --git a/tests/arch/ice40/ice40_dsp.ys b/tests/arch/ice40/ice40_dsp.ys
index 2502738596420547cd32fc82f494e29070f401f6..b13e525fd5baf78545cedf69d8ad887f4523ca32 100644 (file)
--- a/tests/arch/ice40/ice40_dsp.ys
+++ b/tests/arch/ice40/ice40_dsp.ys
@@ -8,4 +8,5 @@ assign o4 = a * b;
 SB_MAC16 m3 (.A(a), .B(b), .O(o5));
 endmodule
 EOT
+read_verilog -lib +/ice40/cells_sim.v
 ice40_dsp