hsail: Remove the MiscReg type.

It has been replaced by the ISA agnostic RegVal.

Change-Id: I563ea3852e37b5c1cf51eb0ac9a6f2a827ba89cf
Reviewed-on: https://gem5-review.googlesource.com/c/14464
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>

diff --git a/src/arch/hsail/gpu_isa.hh b/src/arch/hsail/gpu_isa.hh
index fa2cde3b110519eaef466dd95dbe130823ec1c62..86af90599fef7a514db015e751318d963aa85683 100644 (file)
--- a/src/arch/hsail/gpu_isa.hh
+++ b/src/arch/hsail/gpu_isa.hh
@@ -45,8 +45,6 @@
 
 namespace HsailISA
 {
-    typedef uint64_t MiscReg;
-
     class GPUISA
     {
       public:
@@ -55,12 +53,12 @@ namespace HsailISA
         }
 
         void
-        writeMiscReg(int opIdx, MiscReg operandVal)
+        writeMiscReg(int opIdx, RegVal operandVal)
         {
             fatal("HSAIL does not implement misc registers yet\n");
         }
 
-        MiscReg
+        RegVal
         readMiscReg(int opIdx) const
         {
             fatal("HSAIL does not implement misc registers yet\n");