i915: Move the always_flush_cache code to triangle emit.

This could have broken always_flush_cache on i965, since
reserved_space doesn't reflect the size of the workaround flushes, and
we might run out of space.  This should make always_flush_cache more
useful on pre-i965, anyway (since the point is to flush around each
draw call, even within a batchbuffer).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Paul Berry <stereotype441@gmail.com>

diff --git a/src/mesa/drivers/dri/i915/intel_tris.c b/src/mesa/drivers/dri/i915/intel_tris.c
index eb7fb60eb6dde20e993ed4425f6142a22d076389..23de6ea943b350abf4d37e89d3f3226bca2a1e2a 100644 (file)
--- a/src/mesa/drivers/dri/i915/intel_tris.c
+++ b/src/mesa/drivers/dri/i915/intel_tris.c
@@ -234,6 +234,10 @@ void intel_flush_prim(struct intel_context *intel)
     */
    intel->no_batch_wrap = true;
 
+   if (intel->always_flush_cache) {
+      intel_batchbuffer_emit_mi_flush(intel);
+   }
+
 #if 0
    printf("emitting %d..%d=%d vertices size %d\n", offset,
          intel->prim.current_offset, count,
@@ -306,6 +310,10 @@ void intel_flush_prim(struct intel_context *intel)
       ADVANCE_BATCH();
    }
 
+   if (intel->always_flush_cache) {
+      intel_batchbuffer_emit_mi_flush(intel);
+   }
+
    intel->no_batch_wrap = false;
 
    drm_intel_bo_unreference(vb_bo);

diff --git a/src/mesa/drivers/dri/intel/intel_batchbuffer.c b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
index 036a324ed4f310b4bb8df869199aeddc23f808c0..38cdeda8f49ea57fb6f66e049a256fbf76a42a00 100644 (file)
--- a/src/mesa/drivers/dri/intel/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
@@ -169,10 +169,6 @@ _intel_batchbuffer_flush(struct intel_context *intel,
 
    intel->batch.reserved_space = 0;
 
-   if (intel->always_flush_cache) {
-      intel_batchbuffer_emit_mi_flush(intel);
-   }
-
    /* Mark the end of the buffer. */
    intel_batchbuffer_emit_dword(intel, MI_BATCH_BUFFER_END);
    if (intel->batch.used & 1) {