+Fri Jun 26 11:54:11 1998 David S. Miller <davem@pierdol.cobaltmicro.com>
+
+ * config/sparc/sparc.h (REGNO_OK_FOR_{INDEX,BASE,FP,CCFP}_P):
+ Explicitly mark the constant being compared against as unsigned.
+ * config/sparc/sparc.c (sparc_select, cpu_default, cpu_table):
+ Fully initialize final members.
+ (mem_aligned_8): Explicit init of offset to zero.
+ (output_function_prologue): Explicit init of n_regs to zero.
+ (output_function_epilogue): Likewise, and mark arg size as
+ unused.
+ (init_cumulative_args): Mark libname and indirect as unused.
+ (function_arg_pass_by_reference): Likewise for cum and named.
+ (sparc_builtin_saveregs): Likewise for arglist.
+ (sparc_flat_eligible_for_epilogue_delay): Likewise for slot.
+
Fri Jun 26 06:58:54 1998 Richard Earnshaw (rearnsha@arm.com)
* arm.h (SECONDARY_INPUT_RELOAD_CLASS): Only need a secondary reload
{ (char *)0, "default", 1, 1 },
{ (char *)0, "-mcpu=", 1, 1 },
{ (char *)0, "-mtune=", 1, 0 },
- { 0, 0 }
+ { 0, 0, 0, 0 }
};
/* CPU type. This is set from TARGET_CPU_DEFAULT and -m{cpu,tune}=xxx. */
{ TARGET_CPU_supersparc, "supersparc" },
{ TARGET_CPU_v9, "v9" },
{ TARGET_CPU_ultrasparc, "ultrasparc" },
- { 0 }
+ { 0, 0 }
};
struct cpu_default *def;
/* Table of values for -m{cpu,tune}=. */
{ "v9", PROCESSOR_V9, MASK_ISA, MASK_V9 },
/* TI ultrasparc */
{ "ultrasparc", PROCESSOR_ULTRASPARC, MASK_ISA, MASK_V9 },
- { 0 }
+ { 0, 0, 0, 0 }
};
struct cpu_table *cpu;
struct sparc_cpu_select *sel;
assumption. */
/* See what register we use in the address. */
- base = 0;
+ base = offset = 0;
if (GET_CODE (addr) == PLUS)
{
if (GET_CODE (XEXP (addr, 0)) == REG
base = frame_base_name;
}
+ n_regs = 0;
if (TARGET_EPILOGUE && ! leaf_function)
/* ??? Originally saved regs 0-15 here. */
n_regs = save_regs (file, 0, 8, base, offset, 0, real_offset);
void
output_function_epilogue (file, size, leaf_function)
FILE *file;
- int size;
+ int size ATTRIBUTE_UNUSED;
int leaf_function;
{
char *ret;
base = frame_base_name;
}
+ n_regs = 0;
if (TARGET_EPILOGUE && ! leaf_function)
/* ??? Originally saved regs 0-15 here. */
n_regs = restore_regs (file, 0, 8, base, offset, 0);
void
init_cumulative_args (cum, fntype, libname, indirect)
CUMULATIVE_ARGS *cum;
- tree fntype, libname;
- int indirect;
+ tree fntype;
+ tree libname ATTRIBUTE_UNUSED;
+ int indirect ATTRIBUTE_UNUSED;
{
cum->words = 0;
cum->prototype_p = fntype && TYPE_ARG_TYPES (fntype);
int
function_arg_pass_by_reference (cum, mode, type, named)
- const CUMULATIVE_ARGS *cum;
+ const CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED;
enum machine_mode mode;
tree type;
- int named;
+ int named ATTRIBUTE_UNUSED;
{
if (TARGET_ARCH32)
{
rtx
sparc_builtin_saveregs (arglist)
- tree arglist;
+ tree arglist ATTRIBUTE_UNUSED;
{
int first_reg = current_function_args_info.words;
rtx address;
int
sparc_flat_eligible_for_epilogue_delay (trial, slot)
rtx trial;
- int slot;
+ int slot ATTRIBUTE_UNUSED;
{
rtx pat = PATTERN (trial);
has been allocated, which happens in local-alloc.c. */
#define REGNO_OK_FOR_INDEX_P(REGNO) \
-((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
+((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32U)
#define REGNO_OK_FOR_BASE_P(REGNO) \
-((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32)
+((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32U)
#define REGNO_OK_FOR_FP_P(REGNO) \
- (((unsigned) (REGNO) - 32 < (TARGET_V9 ? 64 : 32)) \
- || ((unsigned) reg_renumber[REGNO] - 32 < (TARGET_V9 ? 64 : 32)))
+ (((unsigned) (REGNO) - 32 < (TARGET_V9 ? 64U : 32U)) \
+ || ((unsigned) reg_renumber[REGNO] - 32 < (TARGET_V9 ? 64U : 32U)))
#define REGNO_OK_FOR_CCFP_P(REGNO) \
(TARGET_V9 \
- && (((unsigned) (REGNO) - 96 < 4) \
- || ((unsigned) reg_renumber[REGNO] - 96 < 4)))
+ && (((unsigned) (REGNO) - 96 < 4U) \
+ || ((unsigned) reg_renumber[REGNO] - 96 < 4U)))
/* Now macros that check whether X is a register and also,
strictly, whether it is in a specified class.