pa.md (rotlsi3): New expander.

        * pa.md (rotlsi3): New expander.  Synthesize a variable rotate
        left using a variable rotate right.  Provide anonymous pattern for
        rotate left by a constant value.

From-SVN: r25936

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9573ce784c4309ff1e590faccae25331a64c5385..def552bbeebed82238c3543683cdcd16ca4ca75f 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,9 @@
 Tue Mar 23 23:32:14 1999  Jeffrey A Law  (law@cygnus.com)
 
+       * pa.md (rotlsi3): New expander.  Synthesize a variable rotate
+       left using a variable rotate right.  Provide anonymous pattern for
+       rotate left by a constant value.
+
        * expr.c (expand_assignment): Do not try to optimize a aggregate
        address which has VOIDmode.
 

diff --git a/gcc/config/pa/pa.md b/gcc/config/pa/pa.md
index 0edbf3139cdc2fb2d587f3a52ba2e1e29732c422..078a04efd680c364cbb29a33c14b282cab5dbb4e 100644 (file)
--- a/gcc/config/pa/pa.md
+++ b/gcc/config/pa/pa.md
@@ -3901,6 +3901,36 @@
   [(set_attr "type" "shift")
    (set_attr "length" "4")])
 
+(define_expand "rotlsi3"
+  [(set (match_operand:SI 0 "register_operand" "")
+        (rotate:SI (match_operand:SI 1 "register_operand" "")
+                   (match_operand:SI 2 "arith32_operand" "")))]
+  ""
+  "
+{
+  if (GET_CODE (operands[2]) != CONST_INT)
+    {
+      rtx temp = gen_reg_rtx (SImode);
+      emit_insn (gen_subsi3 (temp, GEN_INT (32), operands[2]));
+      emit_insn (gen_rotrsi3 (operands[0], operands[1], temp));
+      DONE;
+    }
+  /* Else expand normally.  */
+}")
+
+(define_insn ""
+  [(set (match_operand:SI 0 "register_operand" "=r")
+        (rotate:SI (match_operand:SI 1 "register_operand" "r")
+                   (match_operand:SI 2 "const_int_operand" "n")))]
+  ""
+  "*
+{
+  operands[2] = GEN_INT ((32 - INTVAL (operands[2])) & 31);
+  return \"shd %1,%1,%2,%0\";
+}"
+  [(set_attr "type" "shift")
+   (set_attr "length" "4")])
+
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=r")
        (match_operator:SI 5 "plus_xor_ior_operator"