Revert "AArch64: Add if condition in aarch64_function_value [PR96479]"

This reverts commit b418ccb358e428091fb9c6020fd10be5ae40a17a.

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index f80594d2331dfd47e8216681450fe826f9052805..b7f5bc76f1baa0e1df8d4a91281c7245ec3db973 100644 (file)
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -5554,10 +5554,6 @@ aarch64_function_value (const_tree type, const_tree func,
   if (aarch64_vfp_is_call_or_return_candidate (mode, type, &ag_mode, &count,
                                               NULL, false))
     {
-      /* TYPE passed in fp/simd registers.  */
-      if (!TARGET_FLOAT)
-       aarch64_err_no_fpadvsimd (ag_mode);
-
       gcc_assert (!sve_p);
       if (!aarch64_composite_type_p (type, mode))
        {

diff --git a/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_1.c b/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_1.c
index 6f785c99b74c0d4869e0c300587d9c01cd5d9390..336402ead84dc3c6b6f9e803ef5ad8f727792332 100644 (file)
--- a/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/mgeneral-regs_1.c
@@ -4,6 +4,6 @@ typedef int int32x2_t __attribute__ ((__vector_size__ ((8))));
 
 /* { dg-error "'-mgeneral-regs-only' is incompatible with the use of vector types" "" {target "aarch64*-*-*"} .+1 } */
 int32x2_t test (int32x2_t a, int32x2_t b)
-{ /* { dg-error "'-mgeneral-regs-only' is incompatible with the use of vector types" } */
-  return a + b; /* { dg-error "'-mgeneral-regs-only' is incompatible with the use of vector types" } */
+{
+  return a + b;
 }