Fix techmap for inout ports connected to inout ports

diff --git a/passes/techmap/techmap.cc b/passes/techmap/techmap.cc
index 6784f48c3dd0501b04c93b7e8cbcf0fb8e480f76..b351d3be8fbbb715a4313e06db0dd70bb5c0340f 100644 (file)
--- a/passes/techmap/techmap.cc
+++ b/passes/techmap/techmap.cc
@@ -305,10 +305,15 @@ struct TechmapWorker
                                // approach that yields nicer outputs:
                                // replace internal wires that are connected to external wires
 
-                               if (w->port_output)
+                               if (w->port_output && !w->port_input) {
                                        port_signal_map.add(c.second, c.first);
-                               else
+                               } else
+                               if (!w->port_output && w->port_input) {
                                        port_signal_map.add(c.first, c.second);
+                               } else {
+                                       module->connect(c);
+                                       extra_connect = SigSig();
+                               }
 
                                for (auto &attr : w->attributes) {
                                        if (attr.first == "\\src")