integration/builder: Add LiteX define to generated variables (to distinguish MiSoC...

diff --git a/litex/soc/integration/builder.py b/litex/soc/integration/builder.py
old mode 100644 (file)
new mode 100755 (executable)
index dab50d0..ddeccfa
--- a/litex/soc/integration/builder.py
+++ b/litex/soc/integration/builder.py
@@ -70,6 +70,8 @@ class Builder:
             variables_contents.append("{}={}\n".format(k, _makefile_escape(v)))
         for k, v in cpu_interface.get_cpu_mak(self.soc.cpu):
             define(k, v)
+        # Distinguish between LiteX and MiSoC.
+        define("LITEX", "1")
         # Distinguish between applications running from main RAM and
         # flash for user-provided software packages.
         if "main_ram" in (m[0] for m in memory_regions):