radv: emit pa_sc_mode_cntl_0 with multisample state.

We don't have the meta kludge with 0 viewports anymore,
so we can always enable them.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 172f95e7c99537a508059eb1d16f39f2f6bd992f..7b44f5c5c8461becaca21ec7df0e5bfe11f0c4dd 100644 (file)
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -612,6 +612,8 @@ radv_update_multisample_state(struct radv_cmd_buffer *cmd_buffer,
        radeon_emit(cmd_buffer->cs, ms->pa_sc_line_cntl);
        radeon_emit(cmd_buffer->cs, ms->pa_sc_aa_config);
 
+       radeon_set_context_reg(cmd_buffer->cs, R_028A48_PA_SC_MODE_CNTL_0, ms->pa_sc_mode_cntl_0);
+
        radv_cayman_emit_msaa_sample_locs(cmd_buffer->cs, num_samples);
 
        /* GFX9: Flush DFSM when the AA mode changes. */
@@ -1143,8 +1145,6 @@ radv_emit_scissor(struct radv_cmd_buffer *cmd_buffer)
                          cmd_buffer->state.dynamic.scissor.scissors,
                          cmd_buffer->state.dynamic.viewport.viewports,
                          cmd_buffer->state.emitted_pipeline->graphics.can_use_guardband);
-       radeon_set_context_reg(cmd_buffer->cs, R_028A48_PA_SC_MODE_CNTL_0,
-                              cmd_buffer->state.pipeline->graphics.ms.pa_sc_mode_cntl_0 | S_028A48_VPORT_SCISSOR_ENABLE(count ? 1 : 0));
 }
 
 static void

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 5f824796fe5413aa4c55dc70f618d72e4fcfb21a..a49fe05993472983a875176717f3dd9cdb8ef995 100644 (file)
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -833,7 +833,8 @@ radv_pipeline_init_multisample_state(struct radv_pipeline *pipeline,
                S_028A4C_MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE(1) |
                S_028A4C_FORCE_EOV_CNTDWN_ENABLE(1) |
                S_028A4C_FORCE_EOV_REZ_ENABLE(1);
-       ms->pa_sc_mode_cntl_0 = S_028A48_ALTERNATE_RBS_PER_TILE(pipeline->device->physical_device->rad_info.chip_class >= GFX9);
+       ms->pa_sc_mode_cntl_0 = S_028A48_ALTERNATE_RBS_PER_TILE(pipeline->device->physical_device->rad_info.chip_class >= GFX9) |
+                               S_028A48_VPORT_SCISSOR_ENABLE(1);
 
        if (ms->num_samples > 1) {
                unsigned log_samples = util_logbase2(ms->num_samples);