radeonsi: move scratch reloc state setup
authorMarek Olšák <marek.olsak@amd.com>
Sun, 15 Mar 2015 19:13:52 +0000 (20:13 +0100)
committerMarek Olšák <marek.olsak@amd.com>
Mon, 16 Mar 2015 11:54:19 +0000 (12:54 +0100)
- move it to its own function
- do it after all states are emitted
- bump SI_MAX_DRAW_CS_DWORDS

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
src/gallium/drivers/radeonsi/si_pipe.h
src/gallium/drivers/radeonsi/si_state_draw.c

index 29f01f35d38795ccf900949417db6c0846b4ee02..422b873db047da26c5949ab15ccc4b8de6d2d888 100644 (file)
@@ -47,7 +47,8 @@
 #define SI_TRACE_CS_DWORDS             6
 
 #define SI_MAX_DRAW_CS_DWORDS \
-       (/*derived prim state:*/ 3 + /*draw regs:*/ 16 + /*draw packets:*/ 31)
+       (/*scratch:*/ 3 + /*derived prim state:*/ 3 + \
+        /*draw regs:*/ 16 + /*draw packets:*/ 31)
 
 /* Instruction cache. */
 #define SI_CONTEXT_INV_ICACHE          (R600_CONTEXT_PRIVATE_FLAG << 0)
index e186694c5c318037a0da0b75bad2111a632c8117..2e77d85a80d61ed5096346e044188830bfa1fb0e 100644 (file)
@@ -149,6 +149,25 @@ static unsigned si_get_ia_multi_vgt_param(struct si_context *sctx,
                S_028AA8_WD_SWITCH_ON_EOP(sctx->b.chip_class >= CIK ? wd_switch_on_eop : 0);
 }
 
+static void si_emit_scratch_reloc(struct si_context *sctx)
+{
+       struct radeon_winsys_cs *cs = sctx->b.rings.gfx.cs;
+
+       if (!sctx->emit_scratch_reloc)
+               return;
+
+       r600_write_context_reg(cs, R_0286E8_SPI_TMPRING_SIZE,
+                              sctx->spi_tmpring_size);
+
+       if (sctx->scratch_buffer) {
+               r600_context_bo_reloc(&sctx->b, &sctx->b.rings.gfx,
+                                     sctx->scratch_buffer, RADEON_USAGE_READWRITE,
+                                     RADEON_PRIO_SHADER_RESOURCE_RW);
+
+       }
+       sctx->emit_scratch_reloc = false;
+}
+
 /* rast_prim is the primitive type after GS. */
 static void si_emit_rasterizer_prim_state(struct si_context *sctx)
 {
@@ -575,20 +594,6 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
        if (sctx->b.flags)
                sctx->atoms.s.cache_flush->dirty = true;
 
-       if (sctx->emit_scratch_reloc) {
-               struct radeon_winsys_cs *cs = sctx->b.rings.gfx.cs;
-               r600_write_context_reg(cs, R_0286E8_SPI_TMPRING_SIZE,
-                               sctx->spi_tmpring_size);
-
-               if (sctx->scratch_buffer) {
-                        r600_context_bo_reloc(&sctx->b, &sctx->b.rings.gfx,
-                               sctx->scratch_buffer, RADEON_USAGE_READWRITE,
-                               RADEON_PRIO_SHADER_RESOURCE_RW);
-
-               }
-               sctx->emit_scratch_reloc = false;
-       }
-
        si_need_cs_space(sctx, 0, TRUE);
 
        /* Emit states. */
@@ -600,6 +605,7 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
        }
 
        si_pm4_emit_dirty(sctx);
+       si_emit_scratch_reloc(sctx);
        si_emit_rasterizer_prim_state(sctx);
        si_emit_draw_registers(sctx, info);
        si_emit_draw_packets(sctx, info, &ib);