[AArch64] Add HXT Phecda core support
authorHongbo Zhang <hongbo.zhang@linaro.org>
Wed, 8 Aug 2018 14:23:59 +0000 (14:23 +0000)
committerJames Greenhalgh <jgreenhalgh@gcc.gnu.org>
Wed, 8 Aug 2018 14:23:59 +0000 (14:23 +0000)
HXT semiconductor's CPU core Phecda, as a variant of Qualcomm qdf24xx,
reuses the same tuning structure and pipeline with it.

Applied on behalf of: Hongbo Zhang <hongbo.zhang@linaro.org>

* config/aarch64/aarch64-cores.def: Add phecda core.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi: Add phecda core.

From-SVN: r263404

gcc/ChangeLog
gcc/config/aarch64/aarch64-cores.def
gcc/config/aarch64/aarch64-tune.md
gcc/doc/invoke.texi

index 4c653ead57ff833bd22868aeee2a5f4926898a73..3c9aea6c52f4b28dc12b6b053b5c14348d7853ed 100644 (file)
@@ -1,3 +1,9 @@
+2018-08-08  Hongbo Zhang  <hongbo.zhang@linaro.org>
+
+       * config/aarch64/aarch64-cores.def: Add phecda core.
+       * config/aarch64/aarch64-tune.md: Regenerate.
+       * doc/invoke.texi: Add phecda core.
+
 2018-08-08  Andreas Krebbel  <krebbel@linux.ibm.com>
 
        PR target/85295
index 3d876b8049dfbc3187ee4f13c9c83598e4cbd83e..437ed1e9d49b81b9b83e8852e359c23e8834bfa2 100644 (file)
@@ -71,6 +71,9 @@ AARCH64_CORE("qdf24xx",     qdf24xx,   falkor,    8A,  AARCH64_FL_FOR_ARCH8 | AA
 /* Samsung ('S') cores. */
 AARCH64_CORE("exynos-m1",   exynosm1,  exynosm1,  8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, exynosm1,  0x53, 0x001, -1)
 
+/* HXT ('h') cores. */
+AARCH64_CORE("phecda",      phecda,    falkor,    8A,  AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, qdf24xx,   0x68, 0x000, -1)
+
 /* ARMv8.1-A Architecture Processors.  */
 
 /* Broadcom ('B') cores. */
index f82222c8f6a82b325194e31d61c734e3f96e0196..ec75b45b21a0c2d06d16b3ea019e193aba37815d 100644 (file)
@@ -1,5 +1,5 @@
 ;; -*- buffer-read-only: t -*-
 ;; Generated automatically by gentune.sh from aarch64-cores.def
 (define_attr "tune"
-       "cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,thunderxt81,thunderxt83,xgene1,falkor,qdf24xx,exynosm1,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55"
+       "cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,thunderxt81,thunderxt83,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55"
        (const (symbol_ref "((enum attr_tune) aarch64_tune)")))
index 1de89680b2769e166e2c8d9386894233b0b27ff8..438274e67f8ebdf987e71cc2030b5f15b4532b87 100644 (file)
@@ -14840,7 +14840,7 @@ performance of the code.  Permissible values for this option are:
 @samp{generic}, @samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a55},
 @samp{cortex-a57}, @samp{cortex-a72}, @samp{cortex-a73}, @samp{cortex-a75},
 @samp{cortex-a76}, @samp{exynos-m1}, @samp{falkor}, @samp{qdf24xx},
-@samp{saphira}, @samp{xgene1}, @samp{vulcan}, @samp{thunderx},
+@samp{saphira}, @samp{phecda}, @samp{xgene1}, @samp{vulcan}, @samp{thunderx},
 @samp{thunderxt88}, @samp{thunderxt88p1}, @samp{thunderxt81},
 @samp{thunderxt83}, @samp{thunderx2t99}, @samp{cortex-a57.cortex-a53},
 @samp{cortex-a72.cortex-a53}, @samp{cortex-a73.cortex-a35},