val_reg.type = brw_reg_type_from_bit_size(bit_size, BRW_REGISTER_TYPE_UD);
assert(nir_intrinsic_write_mask(instr) ==
- (1 << instr->num_components) - 1);
+ (1u << instr->num_components) - 1);
if (nir_intrinsic_align(instr) >= 4) {
assert(nir_src_bit_size(instr->src[0]) == 32);
assert(nir_src_num_components(instr->src[0]) <= 4);
val_reg.type = brw_reg_type_from_bit_size(bit_size, BRW_REGISTER_TYPE_UD);
assert(nir_intrinsic_write_mask(instr) ==
- (1 << instr->num_components) - 1);
+ (1u << instr->num_components) - 1);
if (nir_intrinsic_align(instr) >= 4) {
assert(nir_src_bit_size(instr->src[0]) == 32);
assert(nir_src_num_components(instr->src[0]) <= 4);
/* brw_nir_lower_mem_access_bit_sizes takes care of this */
assert(nir_src_bit_size(instr->src[0]) == 32);
assert(nir_intrinsic_write_mask(instr) ==
- (1 << instr->num_components) - 1);
+ (1u << instr->num_components) - 1);
src_reg surf_index = get_nir_ssbo_intrinsic_index(instr);
src_reg offset_reg = retype(get_nir_src_imm(instr->src[2]),